X40414S8I-C Intersil, X40414S8I-C Datasheet - Page 2
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X40414S8I-C
Manufacturer Part Number
X40414S8I-C
Description
IC VOLTAGE MON DUAL W/SUP 8-SOIC
Manufacturer
Intersil
Type
Multi-Voltage Supervisorr
Datasheet
1.X40415V8IZ-B.pdf
(24 pages)
Specifications of X40414S8I-C
Number Of Voltages Monitored
2
Output
Open Drain, Push-Pull
Reset
Active High/Active Low
Reset Timeout
Adjustable/Selectable
Voltage - Threshold
1V, 2.9V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Low V
from low voltage conditions, resetting the system when
V
SET is active until V
and stabilizes. A second voltage monitor circuit tracks
the unregulated supply to provide a power fail warning
or monitors different power supply voltage. Three com-
mon low voltage combinations are available, however,
Intersil’s unique circuits allows the threshold for either
voltage monitor to be reprogrammed to meet special
needs or to fine-tune the threshold for applications re-
quiring higher precision.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
Triple Voltage Monitors
*Voltage monitor requires V
PIN CONFIGURATION
PIN DESCRIPTION
SOIC TSSOP
CC
X40414/15
1
2
3
4
5
X4040/11
falls below the minimum V
Device
CC
Pin
-A
-B
-C
-A
-B
-C
detection circuitry protects the user’s system
3
4
5
6
7
RESET/RESET
V2MON V2 Voltage Monitor Input. When the V2MON input is less than the V
RESET/
V2FAIL V2 Voltage Fail Output. This open drain output goes LOW when V2MON is less than V
RESET
Name
V2MON
SDA
V2FAIL
V
CC
Expected System Voltages
SS
V
CC
SS
returns to proper operating level
3V or 3.3V; 1.1 or 1.2V
to operation. Others are independent of V
X40410/14, X40411/15
goes HIGH when V2MON exceeds V
LOW. This input can monitor an unregulated power supply with an external resistor divider or can
monitor a second power supply with no external components. Connect V2MON to V
not used.The V2MON comparator is supplied by V2MON (X40410/11) or by V
RESET Output. (X40411/15) This is an active LOW, open drain output which goes active whenever
V
RESET Output. (X40410/14) This is an active HIGH CMOS output which goes active whenever V
falls below V
Ground
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open
drain output and may be wire ORed with other open drain or open collector outputs. This pin requires
a pull up resistor and the input buffer is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to
LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this transi-
tion within the watchdog time out period results in WDO going active.
2
CC
5V; 3V or 3.3V
3V; 3.3V; 1.8V
3V; 3.3V; 1.5V
1
2
3
4
8-Pin SOIC
falls below V
3V; 1.5V
TRIP1
5V; 3V
point. RESET/RE-
TRIP1
X40410, X40411, X40414, X40415
8
7
6
5
TRIP1
. It will remain active until
V
WDO
SCL
SDA
CC
. It will remain active until V
4.55–4.65*
4.35–4.45*
2.85–2.95*
2.85–2.95*
2.55–2.65*
2.85–2.95*
Vtrip1(V)
2.0–4.75*
2.0–4.75*
CC
.
TRIP2
controller fails to restart a timer within a selectable
time out interval, the device activates the WDO signal.
The user selects the interval from three preset values.
Once selected, the interval does not change, even
after cycling the power.
The memory portion of the device is a CMOS Serial
EEPROM array with Intersil’s Block Lock protection.
The array is internally organized as x 8. The device
features a 2-wire interface and software protocol
allowing operation on an I
The device utilizes Intersil’s proprietary Direct Write
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
. There is no power-up reset delay circuitry on this pin.
V
V2MON
Function
V2FAIL
CC
WDO
V
CC
rises above V
CC
X40410/14, X40411/15
rises above V
1
2
3
4
0.90–3.50*
1.25–1.35*
1.25–1.35*
0.95–1.05*
Vtrip2(V)
1.70–4.75
2.85–2.95
2.55–2.65
1.65–1.75
8-Pin TSSOP
TRIP1
TRIP1
8
7
6
5
and for the t
2
C
TRIP2
and for the t
®
SCL
SDA
V
RESET/RESET
bus.
SS
voltage, V2FAIL goes
RESET = X40410
RESET = X40411
RESET = X40414
RESET = X40415
CC
POR (system)
PURST
Input (X40414/15).
PURST
SS
or
thereafter.
TRIP2
V
thereafter.
March 28, 2005
CC
when
FN8116.0
and
CC
™