LT6234IS8#TR Linear Technology, LT6234IS8#TR Datasheet - Page 17

IC OP AMP DUAL 60MHZ R-R 8-SOIC

LT6234IS8#TR

Manufacturer Part Number
LT6234IS8#TR
Description
IC OP AMP DUAL 60MHZ R-R 8-SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LT6234IS8#TR

Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
17 V/µs
Gain Bandwidth Product
60MHz
Current - Input Bias
1.5µA
Voltage - Input Offset
50µV
Current - Supply
1.15mA
Current - Output / Channel
55mA
Voltage - Supply, Single/dual (±)
3 V ~ 12.6 V, ±1.5 V ~ 6.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
-3db Bandwidth
-

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applicaTions inForMaTion
Amplifier Characteristics
Figure 1 is a simplified schematic of the LT6233/LT6234/
LT6235, which has a pair of low noise input transistors
Q1 and Q2. A simple current mirror Q3/Q4 converts the
differential signal to a single-ended output, and these
transistors are degenerated to reduce their contribution
to the overall noise.
Capacitor C1 reduces the unity-cross frequency and im-
proves the frequency stability without degrading the gain
bandwidth of the amplifier. Capacitor C
amplifier gain bandwidth. The differential drive generator
supplies current to transistors Q5 and Q6 that swing the
output from rail-to-rail.
Input Protection
There are back-to-back diodes, D1 and D2 across the + and
– inputs of these amplifiers to limit the differential input
voltage to ±0.7V. The inputs of the LT6233/LT6234/LT6235
do not have internal resistors in series with the input tran-
sistors. This technique is often used to protect the input
devices from overvoltage that causes excessive current
to flow. The addition of these resistors would significantly
degrade the low noise voltage of these amplifiers. For
instance, a 100Ω resistor in series with each input would
generate 1.8nV/√Hz of noise, and the total amplifier noise
voltage would rise from 1.9nV/√Hz to 2.6nV/√Hz. Once
the input differential voltage exceeds ±0.7V, steady-state
current conducted through the protection diodes should
DESD1
–V
+V
DESD3
IN
IN
–V
–V
D1
+V
+V
DESD2
DESD4
M
C1
sets the overall
–V
D2
Figure 1. Simplified Schematic
Q3
Q1
I
1
Q2
Q4
be limited to ±40mA. This implies 25Ω of protection re-
sistance is necessary per volt of overdrive beyond ±0.7V.
These input diodes are rugged enough to handle transient
currents due to amplifier slew rate overdrive and clipping
without protection resistors.
The photo of Figure 2 shows the output response to an
input overdrive with the amplifier connected as a voltage
follower. With the input signal low, current source I
rates and the differential drive generator drives Q6 into
saturation so the output voltage swings all the way to V
The input can swing positive until transistor Q2 saturates
into current mirror Q3/Q4. When saturation occurs, the
output tries to phase invert, but diode D2 conducts current
from the signal source to the output through the feedback
connection. The output is clamped a diode drop below the
input. In this photo, the input signal generator is limiting
at about 20mA.
DRIVE GENERATOR
C
DIFFERENTIAL
M
BIAS
Figure 2. V
–2.5V
2.5V
0V
S
Q5
Q6
= ±2.5V, A
LT6233/LT6233-10
623345 F01
+V
–V
+V
DESD5
DESD6
500µs/DIV
V
+V
V
ENABLE
–V
LT6234/LT6235
OUT
= 1 with Large Overdrive
623345 F02
17
1
623345fc
satu-
.

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