MC908SR12CBE Freescale Semiconductor, MC908SR12CBE Datasheet - Page 304
MC908SR12CBE
Manufacturer Part Number
MC908SR12CBE
Description
IC MCU 12K FLASH 8MHZ 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908SR12MFAE.pdf
(404 pages)
Specifications of MC908SR12CBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
29
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Multi-Master IIC Interface (MMIIC)
Data Sheet
304
MMBB — MMIIC Bus Busy Flag
MMAST — MMIIC Master Control
MMRW — MMIIC Master Read/Write
MMCRCEF — MMIIC CRC Error Flag
This flag is set after a start condition is detected (bus busy), and is
cleared when a stop condition (bus idle) is detected or the MMIIC is
disabled. Reset clears this bit.
This bit is set to initiate a master mode transfer. In master mode, the
module generates a start condition to the SDA and SCL lines,
followed by sending the calling address stored in MMADR.
When the MMAST bit is cleared by MMNAKIF set (no acknowledge)
or by software, the module generates the stop condition to the lines
after the current byte is transmitted.
If an arbitration loss occurs (MMALIF = 1), the module reverts to slave
mode by clearing MMAST, and releasing SDA and SCL lines
immediately.
This bit is cleared by writing "0" to it or by reset.
This bit is transmitted out as bit 0 of the calling address when the
module sets the MMAST bit to enter master mode. The MMRW bit
determines the transfer direction of the data bytes that follows. When
it is "1", the module is in master receive mode. When it is "0", the
module is in master transmit mode. Reset clears this bit.
This flag is set when a CRC error is detected, and cleared when no
CRC error is detected. The MMCRCEF is only meaningful after
receiving a PEC data. This flag is unaffected by reset.
1 = Start condition detected
0 = Stop condition detected or MMIIC is disabled
1 = Master mode operation
0 = Slave mode operation
1 = Master mode receive
0 = Master mode transmit
1 = CRC error detected on PEC byte
0 = No CRC error detected on PEC byte
Multi-Master IIC Interface (MMIIC)
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
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