MCF5307FT90B Freescale Semiconductor, MCF5307FT90B Datasheet - Page 298
MCF5307FT90B
Manufacturer Part Number
MCF5307FT90B
Description
IC MPU 32BIT COLDF 90MHZ 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307FT90B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
90MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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General-Purpose Timer Units
13.1.1 Key Features
Each general-purpose 16-bit timer unit has the following features:
13.2 General-Purpose Timer Units
The general-purpose timer units provide the following features:
13.3 General-Purpose Timer Programming Model
The following features are programmable through the timer registers, shown in Table 13-1:
13-2
• Maximum period of 5.96 seconds at 45 MHz
• 27-nS resolution at 45 MHz
• Programmable sources for the clock input, including external clock
• Input-capture capability with programmable trigger edge on input pin
• Output-compare with programmable mode for the output pin
• Free run and restart modes
• Maskable interrupts on input capture or reference-compare
• Each timer can be programmed to count and compare to a reference value stored in
• System bus clock can be divided by 16 or 1. This clock is input to the prescaler.
• TIN is fed directly into the 8-bit prescaler. The maximum value of TIN is 1/5 of
• The 8-bit prescaler clock divides the clocking source and is user-programmable
• Programmed events generate interrupts.
• The timer output signal (TOUT) can be configured to toggle or pulse on an event.
• Prescaler—The prescaler clock input is selected from BCLKO (divided by 1 or 16)
• Capture mode—Each timer has a 16-bit timer capture register (TCR0 and TCR1)
a register or capture the timer value at an edge detected on TIN.
CLKIN, as described in Chapter 20, “Electrical Specifications.”
from 1 to 256.
or from the corresponding timer input, TIN. TIN is synchronized to BCLKO. The
synchronization delay is between two and three BCLKO clocks. The corresponding
TMRn[ICLK] selects the clock input source. A programmable prescaler divides the
clock input by values from 1 to 256. The prescaler is an input to the 16-bit counter.
that latches the counter value when the corresponding input capture edge detector
senses a defined TIN transition. The capture edge bits (TMRn[CE]) select the type
of transition that triggers the capture, sets the timer event register capture event bit,
TERn[CAP], and issues a maskable interrupt.
Freescale Semiconductor, Inc.
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MCF5307 User’s Manual
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