ST7FLITE39F2U6 STMicroelectronics, ST7FLITE39F2U6 Datasheet - Page 51
ST7FLITE39F2U6
Manufacturer Part Number
ST7FLITE39F2U6
Description
IC MCU 8BIT 8K FLASH 20QFN
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITE35F2M6TR.pdf
(173 pages)
Specifications of ST7FLITE39F2U6
Core Processor
ST7
Core Size
8-Bit
Speed
16MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
For Use With
497-8406 - BOARD STF20NM50FD/STF7LITE39BF2497-8403 - BOARD DEMO STCC08 AC SW DETECTOR497-6398 - BOARD EVAL ST7FLITE39/STM1403497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5514 - EVAL BOARD THERMO CONTROL REFRIG497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5635
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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I/O PORTS (Cont’d)
The I/O port register configurations are summa-
rised as follows.
Standard Ports
PA7:0, PB6:0
Table 11. Port Configuration (Standard ports)
Note: On ports where the external interrupt capability is selected using the EISR register, the configura-
tion will be as follows:
Table 12. Port Configuration (external interrupts)
Table 13. I/O Port Register Map and Reset Values
floating input
pull-up input
open drain output
push-pull output
Address
(Hex.)
0000h
0001h
0002h
0003h
0004h
0005h
Port A
Port B
Port A
Port B
Port
Port
PADR
Reset Value
PADDR
Reset Value
PAOR
Reset Value
PBDR
Reset Value
PBDDR
Reset Value
PBOR
Reset Value
MODE
Register
Label
PA7:0
PB6:0
PA6:1
PB5:0
Pin name
Pin name
MSB
MSB
MSB
MSB
MSB
MSB
7
1
0
0
1
0
0
DDR
0
0
1
1
OR = 0
floating
floating
6
1
0
1
1
0
0
Input (DDR=0)
OR
0
1
0
1
OR = 0
floating
floating
5
1
0
0
1
0
0
Input with interrupt (DDR=0 ; EISR≠00)
Interrupt Ports
Ports where the external interrupt capability is
selected using the EISR register
OR = 1
floating input
pull-up interrupt input
pull-up
pull-up
4
1
0
0
1
0
0
MODE
3
1
0
0
1
0
0
open drain
open drain
OR = 0
Output (DDR=1)
2
1
0
0
1
0
0
OR = 1
pull-up
pull-up
ST7LITE3xF2
1
1
0
0
1
0
0
DDR
0
0
push-pull
push-pull
OR = 1
LSB
LSB
LSB
LSB
LSB
LSB
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OR
0
1
0
0
1
0
0
0
1
1
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