ATMEGA6450V-8AI Atmel, ATMEGA6450V-8AI Datasheet - Page 302
ATMEGA6450V-8AI
Manufacturer Part Number
ATMEGA6450V-8AI
Description
IC AVR MCU FLASH 64K 1.8 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA325-16MU.pdf
(362 pages)
Specifications of ATMEGA6450V-8AI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK504 - STARTER KIT AVR EXP MOD 100P LCD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA6450V-8AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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27.6
2570M–AVR–04/11
SPI Timing Characteristics
See
Table 27-6.
Note:
Figure 27-4. SPI Interface Timing Requirements (Master Mode)
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 27-4
(Data Output)
(Data Input)
(CPOL = 0)
(CPOL = 1)
1. In SPI Programming mode the minimum SCK high/low period is:
SS high to tri-state
SCK to out high
SCK to SS high
- 2 t
- 3 t
MISO
MOSI
SCK high/low
SS low to SCK
Rise/Fall time
Rise/Fall time
SCK
SCK
SCK high/low
SS low to out
Description
SCK period
SCK period
Out to SCK
SCK to out
SCK to out
SS
SPI Timing Parameters
CLCL
CLCL
Setup
Setup
Hold
Hold
and
for f
for f
Figure 27-5
CK
CK
(1)
< 12 MHz
> 12 MHz
6
4
MSB
5
MSB
for details.
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
7
20 • t
4 • t
2 • t
ATmega325/3250/645/6450
Min
10
20
t
ck
...
ck
ck
ck
...
See
50% duty cycle
0.5 • t
Table 18-5
Typ
3.6
1.6
10
10
10
10
15
15
10
2
sck
LSB
1
LSB
2
Max
3
8
ns
µs
ns
302
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