AT87C52X2-3CSUL Atmel, AT87C52X2-3CSUL Datasheet - Page 21
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AT87C52X2-3CSUL
Manufacturer Part Number
AT87C52X2-3CSUL
Description
IC 8051 MCU 8K OTP 30MHZ 40DIP
Manufacturer
Atmel
Series
87Cr
Datasheet
1.TS87C52X2-VCA.pdf
(55 pages)
Specifications of AT87C52X2-3CSUL
Core Processor
8051
Core Size
8-Bit
Speed
30/20MHz
Connectivity
UART/USART
Peripherals
POR
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
4184G–8051–09/06
Table 10. PCON Register
PCON - Power Control Register (87h)
Reset Value = 00X1 0000b
Not bit addressable
Power-off flag reset value will be 1 only after a power on (cold reset). A warm reset
doesn’t affect the value of this bit.
SMOD1
Number
Bit
7
7
6
5
4
3
2
1
0
Mnemonic
SMOD0
SMOD1
SMOD0
POF
6
GF1
GF0
Bit
PD
IDL
-
Description
Serial port Mode bit 1
Set to select double baud rate in mode 1, 2 or 3.
Serial port Mode bit 0
Clear to select SM0 bit in SCON register.
Set to to select FE bit in SCON register.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Power-off Flag
Clear to recognize next reset type.
Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set
by software.
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
Power-down mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
Idle mode bit
Clear by hardware when interrupt or reset occurs.
Set to enter idle mode.
5
-
POF
4
GF1
3
GF0
2
TS8xCx2X2
PD
1
IDL
0
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