AT89C51SND2C-7FTUL Atmel, AT89C51SND2C-7FTUL Datasheet - Page 150

• Manufacturer Part Number: AT89C51SND2C-7FTUL
• Description: IC 8051 MCU FLASH 64K MP3 100BGA
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51SND2C-7FTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b; D/A 2x20b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: ATAPI, I2S, IDE, SPI, UART, USB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C51SND2C7FTUL

18.8
150
Registers
AT8xC51SND2C/MP3B
Table 18-8.
MMCON0 (S:E4h) – MMC Control Register 0
Reset Value = 0000 0000b
Bit Number
DRPTR
7
7
6
5
4
3
2
1
0
Mnemonic
MBLOCK
CRCDIS
MMCON0 Register
DTPTR
DRPTR
DTPTR
CRPTR
CTPTR
DFMT
RFMT
Bit
6
Description
Data Receive Pointer Reset Bit
Set to reset the read pointer of the data FIFO.
Clear to release the read pointer of the data FIFO.
Data Transmit Pointer Reset Bit
Set to reset the write pointer of the data FIFO.
Clear to release the write pointer of the data FIFO.
Command Receive Pointer Reset Bit
Set to reset the read pointer of the receive command FIFO.
Clear to release the read pointer of the receive command FIFO.
Command Transmit Pointer Reset Bit
Set to reset the write pointer of the transmit command FIFO.
Clear to release the read pointer of the transmit command FIFO.
Multi-block Enable Bit
Set to select multi-block data format.
Clear to select single block data format.
Data Format Bit
Set to select the block-oriented data format.
Clear to select the stream data format.
Response Format Bit
Set to select the 48-bit response format.
Clear to select the 136-bit response format.
Clear to enable the CRC7 computation when receiving a response.
CRC7 Disable Bit
Set to disable the CRC7 computation when receiving a response.
CRPTR
5
CTPTR
4
MBLOCK
3
DFMT
2
RFMT
1
4341H–MP3–10/07
CRCDIS
0