UPD70F3739GC-UEU-AX Renesas Electronics America, UPD70F3739GC-UEU-AX Datasheet - Page 565
UPD70F3739GC-UEU-AX
Manufacturer Part Number
UPD70F3739GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet
1.UPD70F3739GC-UEU-AX.pdf
(889 pages)
Specifications of UPD70F3739GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3739GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
(3) IIC flag registers 0 to 2 (IICF0 to IICF2)
The IICFn register sets the I
This register can be read or written in 8-bit or 1-bit units. However, the STCFn and IICBSYn bits are read-only.
IICRSVn enables/disables the communication reservation function (see 17.14 Communication Reservation).
The initial value of the IICBSYn bit is set by using the STCENn bit (see 17.15 Cautions).
The IICRSVn and STCENn bits can be written only when operation of I
operation is enabled, IICFn can be read (n = 0 to 2).
Reset sets this register to 00H.
2
C0n operation mode and indicates the I
2
C bus status.
2
C0n is disabled (IICCn.IICEn bit = 0). After
CHAPTER 17 I
Page 549 of 870
2
C BUS
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