UPD70F3739GC-UEU-AX Renesas Electronics America, UPD70F3739GC-UEU-AX Datasheet - Page 43
UPD70F3739GC-UEU-AX
Manufacturer Part Number
UPD70F3739GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet
1.UPD70F3739GC-UEU-AX.pdf
(889 pages)
Specifications of UPD70F3739GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3739GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 43 of 889
- Download datasheet (11Mb)
V850ES/JG3
3.2.1
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
The program registers include general-purpose registers and a program counter.
(1) General-purpose registers (r0 to r31)
(2) Program counter (PC)
r0
r1
r2
r3
r4
r5
r6 to r29
r30
r31
PC
Name
Thirty-two general-purpose registers, r0 to r31, are available. Any of these registers can be used to store a data
variable or an address variable.
However, r0 and r30 are implicitly used by instructions and care must be exercised when these registers are used.
r0 always holds 0 and is used for an operation that uses 0 or addressing of offset 0. r30 is used by the SLD and
SST instructions as a base pointer when these instructions access the memory. r1, r3 to r5, and r31 are implicitly
used by the assembler and C compiler. When using these registers, save their contents for protection, and then
restore the contents after using the registers. r2 is sometimes used by the real-time OS. If the real-time OS does
not use r2, it can be used as a register for variables.
Remark
The program counter holds the instruction address during program execution. The lower 26 bits of this register are
valid. Bits 31 to 26 are fixed to 0. A carry from bit 25 to 26 is ignored even if it occurs.
Bit 0 is fixed to 0. This means that execution cannot branch to an odd address.
Program register set
PC
Zero register
Assembler-reserved register
Register for address/data variable (if real-time OS does not use r2)
Stack pointer
Global pointer
Text pointer
Register for address/data variable
Element pointer
Link pointer
Program counter
31
For furthers details on the r1, r3 to r5, and r31 that are used in the assembler and C compiler, refer to
the CA850 (C Compiler Package) Assembly Language User’s Manual.
Fixed to 0
26 25
Usage
Instruction address during program execution
Table 3-1. Program Registers
Always holds 0.
Used as working register to create 32-bit immediate data
Used to create a stack frame when a function is called
Used to access a global variable in the data area
Used as register that indicates the beginning of a text area (area
where program codes are located)
Used as base pointer to access memory
Used when the compiler calls a function
Holds the instruction address during program execution
Operation
CHAPTER 3 CPU FUNCTION
1 0
0
Default value
00000000H
Page 27 of 870
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