UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 968
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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- Download datasheet (7Mb)
78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Clock
generator
X1/XT1
oscillator
Function
OSMC:
Operation speed
mode control
register
Details of
Function
−
To shift to STOP mode while V
less.
The HALT mode current when operating on the subsystem clock can be reduced by
setting RTCLPC to 1. However, the clock cannot be supplied to peripheral functions
except the real-time counter in the subsystem clock HALT mode. Set bit 7 (RTCEN)
of PER0 to 1 and bits 0 to 6 of PER0 to 0 before setting the subsystem clock HALT
mode.
Once FLPC has been set from 0 to 1, setting it back to 0 from 1 other than by reset is
prohibited.
When setting FSEL to “1”, do so while RMC = 00H.
When setting FLPC to “1”, do so while RMC = 5AH.
When using the X1 oscillator and XT1 oscillator, wire as follows in the area enclosed
by the broken lines in the Figures 5-10 and 5-11 to avoid an adverse effect from
wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines. Do not route the wiring near a
• Always make the ground point of the oscillator capacitor the same potential as V
• Do not fetch signals from the oscillator.
Note that the XT1 oscillator is designed as a low-gain circuit for achieving low-power
consumption. Note the following points when designing the XT1 oscillator.
• The pins and circuit board include parasitic capacitance. Therefore, confirm that
• When low-consumption oscillation or super-low-consumption oscillation is selected,
• Keep the wiring length between the XT1 and XT2 pins and resonator as short as
• Configure the circuit board by using material with little parasitic capacitance and
• Place a ground pattern that has the same potential as V
• Do not cross the signal lines between the XT1 and XT2 pins and the resonator with
• Moisture absorption by the circuit board and condensation on the board in a highly
• Coat the surface of the circuit board by using material that does not generate
signal line through which a high fluctuating current flows.
Do not ground the capacitor to a ground pattern through which a high current flows.
there are no problems by performing oscillation evaluation on the circuit board to
be actually used.
lower power consumption than when selecting normal oscillation can be achieved.
However, in this case, the XT1 oscillation margin is reduced, so perform sufficient
oscillation evaluation of the resonator to be used for XT1 oscillation before using
the resonator.
possible and parasitic capacitance and wire resistance as small as possible. This
is particularly important when super-low-consumption oscillation (AMPHS1 = 1) is
selected.
wire resistance.
XT1 oscillator.
other signal lines. Do not route the signal lines near a signal line through which a
high fluctuating current flows.
humid environment may cause the impedance between the XT1 and XT2 pins to
drop and disable oscillation. When using the circuit board in such an environment,
prevent the circuit board from absorbing moisture by taking measures such as
coating the circuit board.
capacitance or leakage between the XT1 and XT2 pins.
DD
≤ 2.7 V, set FSEL = 0 after setting f
Cautions
APPENDIX C LIST OF CAUTIONS
SS
(if possible) around the
CLK
to 10 MHz or
SS
.
p.228
p.228
p.228
p.228
p.230
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968
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