UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 427
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 427 of 1016
- Download datasheet (7Mb)
78K0R/Lx3
(3) D/A conversion value setting registers W0, W1 (DACSW0, DACSW1)
(4) D/A conversion value setting registers 0, 1 (DACS0, DACS1)
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Address: FFF58H, FFF59H (DACSW0), FFF5AH, FFF5BH (DACSW1)
Address: FFF58H (DACS0), FFF5AH (DACS1)
DACSWn
Symbol
Caution Rewriting DACSWn during A/D conversion is prohibited when both the positive reference voltage of
Remarks 1. The relations between the resolutions and analog output voltages (V
Remarks 1. The relations between the resolutions and analog output voltages (V
DACSn
Symbol
These registers are used to set an analog voltage value to be output to the ANO0 and ANO1 pins, when the D/A
converter is used.
DACSW0 and DACSW1 can be read by a 16-bit memory manipulation instruction.
Reset signal generation clears these registers to 0000H.
These registers are used to set the analog voltage values to be output to the ANO0 and ANO1 pins when the D/A
converter is used at 8-bit resolution.
DACS0 and DACS1 can be read by an 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Figure 11-4. Format of D/A Conversion Value Setting Registers W0, W1 (DACSW0, DACSW1)
the A/D converter (AD
voltage reference output (V
is stopped (ADCS = 0).
2. n = 0, 1
2. n = 0, 1
15
0
Figure 11-5. Format of D/A Conversion Value Setting Registers 0, 1 (DACS0, DACS1)
DACSn7
follows.
follows.
7
14
0
• 8-bit resolution (DARESn = 0) :
• 12-bit resolution (DARESn = 1) :
• 8-bit resolution (DARESn = 0) :
V
V
V
ANOn
ANOn
ANOn
13
0
DACSn6
= Reference voltage for D/A converter × (DACSWn7 to DACSWn0) /256
= Reference voltage for D/A converter × (DACSWn11 to DACSWn0) /4096
= Reference voltage for D/A converter × (DACSn7 to DACSn0) /256
6
12
0
REFP
DACS
Wn11
11
) and the positive reference voltage of the D/A converter (DA
DACSn5
REFOUT
5
After reset: 00H
DACS
Wn10
10
) (VRSEL = 1 and DAREF = 1). Rewrite it when conversion operation
DACS
Wn9
9
DACSn4
4
DACS
Wn8
8
R/W
DACS
After reset: 0000H
Wn7
7
DACSn3
3
DACS
Wn6
6
DACS
Wn5
5
DACSn2
CHAPTER 11 D/A CONVERTER
2
R/W
DACS
Wn4
4
ANOn
ANOn
DACS
) of the D/A converter are as
) of the D/A converter are as
Wn3
3
DACSn1
1
DACS
Wn2
2
DACS
Wn1
1
DACSn0
REFP
0
DACS
Wn0
) are the
0
427
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