UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 411
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0R/Lx3
10.4.3 A/D converter operation modes
(1) Software trigger mode (Continuous conversion mode)
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
The following four A/D converter operation modes are available.
• Software trigger mode (Continuous conversion mode)
• Software trigger mode (Single conversion mode)
• Timer trigger mode (Continuous conversion mode)
• Timer trigger mode (Single conversion mode)
<1> By setting bit 7 (ADCS) of the A/D converter mode register (ADM) to 1, the A/D conversion operation of the
<2> When A/D conversion has been completed, the result of the A/D conversion is stored in the A/D conversion result
<3> If 1 is written to ADCS during A/D conversion, the A/D conversion operation under execution is stopped and
<4> If ADS is rewritten during A/D conversion, the A/D conversion operation under execution is stopped and restarted
<5> If 0 is written to ADCS during A/D conversion, A/D conversion is immediately stopped.
Remark 78K0R/LF3:
A/D conversion
voltage, which is applied to the analog input pin specified by the analog input channel specification register
(ADS), is started.
register (ADCR, ADCRH), and an interrupt request signal (INTAD) is generated. When one A/D conversion has
been completed, the next A/D conversion operation is immediately started.
restarted from the beginning. At this time, the conversion result immediately before is retained.
from the beginning. At this time, the conversion result immediately before is retained.
conversion result immediately before is retained.
ADCRH
INTAD
ADCS
ADCR,
78K0R/LG3, 78K0R/LH3:
<1> ADCS = 1
Figure 10-16. Software trigger mode (Continuous conversion mode)
ANIn
<2> A/D conversion
is completed
n = 0 to 6, 15, m = 0 to 6, 15
n = 0 to 10, 15, m = 0 to 10, 15
ANIn
<3> ADCS = 1
Conversion operation
under execution is
stopped, and restarted
from the beginning
<4> Rewriting ADS
ANIn
ANIn
ANIm
<2> A/D conversion
CHAPTER 10 A/D CONVERTER
is completed
<5> ADCS = 0
ANIm
ANIm
Conversion operation
under execution is
stopped
At this time, the
411
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