UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 334
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0R/Lx3
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
Remarks 1.
TMRmp
TOMm
TOEm
TOLm
TOm
(a) Timer mode register mp (TMRmp)
(b) Timer output register m (TOm)
(c) Timer output enable register m (TOEm)
(d) Timer output level register m (TOLm)
(e) Timer output mode register m (TOMm)
Figure 6-60. Example of Set Contents of Registers When PWM Function (Slave Channel) Is Used
TOMmp
TOEmp
CKSmp
TOLmp
2.
3.
TOmp
Bit p
Bit p
Bit p
Bit p
1/0
1/0
1/0
1/0
15
1
78K0R/LF3:
• m = 0, n = 0, 2, 6, p = n+1, TO00 to TO04, TO07, TI00 to TI04, and TI07 pins
78K0R/LG3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07, TI00 to TI07 pins
78K0R/LH3:
• m = 0, n = 0, 2, 4, 6, p = n+1, TO00 to TO07, TI00 to TI07 pins
• m = 1, n = 0, 2, p = n+1, TO10 to TO13, TI10 to TI13 pins
Operation clock selection
14
0: Selects CKm0 as operation clock of channel p.
1: Selects CKm1 as operation clock of channel p.
0
* Make the same setting as master channel.
0: Outputs 0 from TOmp.
1: Outputs 1 from TOmp.
0: Stops the TOmp output operation by counting operation.
1: Enables the TOmp output operation by counting operation.
0: Positive logic output (active-high)
1: Inverted output (active-low)
1: Sets the combination operation mode.
13
0
CCSmp
12
0
Count clock selection
TERmp
MAS
11
0: Selects operation clock.
0
Slave/master selection
STSmp2
10
0: Channel 0 is set as slave channel.
1
STSmp1
0
9
Start trigger selection
STSmp0
100B: Selects INTTMmn of master channel.
8
0
CISmp1
7
0
CISmp0
6
0
Selection of TImp pin input edge
00B: Sets 00B because these are not used.
Operation mode of channel p
100B: One-count mode
5
0
CHAPTER 6 TIMER ARRAY UNIT
4
0
Start trigger during operation
MDmp3
1: Trigger input is valid.
3
1
MDmp2
2
0
MDmp1
1
0
MDmp0
0
1
334
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