SAA-XC886CLM-6FFA AC Infineon Technologies, SAA-XC886CLM-6FFA AC Datasheet - Page 84
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SAA-XC886CLM-6FFA AC
Manufacturer Part Number
SAA-XC886CLM-6FFA AC
Description
IC MCU 8BIT 24KB FLASH 48TQFP
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet
1.SAA-XC886CLM-6FFA_AC.pdf
(134 pages)
Specifications of SAA-XC886CLM-6FFA AC
Core Processor
XC800
Core Size
8-Bit
Speed
103.2MHz
Connectivity
CAN, LIN, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
1.75K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
48-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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3.10
The Watchdog Timer (WDT) provides a highly reliable and secure way to detect and
recover from software or hardware failures. The WDT is reset at a regular interval that is
predefined by the user. The CPU must service the WDT within this interval to prevent the
WDT from causing an SAA-XC886 system reset. Hence, routine service of the WDT
confirms that the system is functioning properly. This ensures that an accidental
malfunction of the SAA-XC886 will be aborted in a user-specified time period.
In debug mode, the WDT is default suspended and stops counting. Therefore, there is
no need to refresh the WDT during debugging.
Features
•
•
•
•
•
The WDT is a 16-bit timer incremented by a count rate of
timer is realized as two concatenated 8-bit timers. The upper 8 bits of the WDT can be
preset to a user-programmable value via a watchdog service access in order to modify
the watchdog expire time period. The lower 8 bits are reset on each service access.
Figure 27
Figure 27
Data Sheet
ENWDT
ENWDT_P
16-bit Watchdog Timer
Programmable reload value for upper 8 bits of timer
Programmable window boundary
Selectable input frequency of
Time-out detection with NMI generation and reset prewarning activation (after which
a system reset will be performed)
f
PCLK
shows the block diagram of the WDT unit.
Watchdog Timer
Logic
WDT Block Diagram
1:128
1:2
f
PCLK
WDTIN
/2 or
MUX
77
f
PCLK
/128
WDT Low Byte
Control
WDT
Overflow/Time-out Control &
Window-boundary control
Clear
f
PCLK
/2 or
Functional Description
WDT High Byte
WDTWINB
WDTREL
f
PCLK
SAA-XC886CLM
/128. This 16-bit
V1.1, 2010-08
FNMIWDT
WDTRST
.
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