SAA-XC866L-2FRA BE Infineon Technologies, SAA-XC866L-2FRA BE Datasheet - Page 26
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SAA-XC866L-2FRA BE
Manufacturer Part Number
SAA-XC866L-2FRA BE
Description
IC MCU 8BIT 4KB FLASH 38TSSOP
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet
1.SAA-XC866-1FRA_AB.pdf
(114 pages)
Specifications of SAA-XC866L-2FRA BE
Core Processor
XC800
Core Size
8-Bit
Speed
86MHz
Connectivity
LIN, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
38-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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3.2.2.2
Address extension is further performed at the module level by paging. With the address
extension by mapping, the SAA-XC866 has a 256-SFR address range. However, this is
still less than the total number of SFRs needed by the on-chip peripherals. To meet this
requirement, some peripherals have a built-in local address extension mechanism for
increasing the number of addressable SFRs. The extended address range is not directly
controlled by the CPU instruction itself, but is derived from bit field PAGE in the module
page register MOD_PAGE. Hence, the bit field PAGE must be programmed before
accessing the SFR of the target module. Each module may contain a different number
of pages and a different number of SFRs per page, depending on the specific
requirement. Besides setting the correct RMAP bit value to select the SFR area, the user
must also ensure that a valid PAGE is selected to target the desired SFR. A page inside
the extended address range can be selected as shown in
Figure 9
Data Sheet
Address Extension by Paging
Address Extension by Paging
(to/from CPU)
SFR Address
(from CPU)
SFR Data
rw
MOD_PAGE.PAGE
23
Module
Figure
SFR0
SFR1
SFRx
SFR0
SFR1
SFRy
SFR0
SFR1
SFRz
PAGE 0
PAGE 1
PAGE q
Functional Description
9.
SAA-XC866
V1.5, 2010-09
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