M30835FJGP#U3 Renesas Electronics America, M30835FJGP#U3 Datasheet - Page 248
M30835FJGP#U3
Manufacturer Part Number
M30835FJGP#U3
Description
IC M32C/83 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30833FJGPU3.pdf
(96 pages)
3.M30833FJGPU3.pdf
(529 pages)
Specifications of M30835FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R
R
M
e
E
3
. v
J
Figure 16.32 SIM Interface Format
2
0
16.7.2 Format
1
9
C
3 .
B
8 /
0
1
16.7.2.1 Direct Format
16.7.2.2 Inverse Format
3
0
3
J
G
Set the PRYE bit to "1", the PRY bit to "0", the UFORM bit to "1" and the UiLCH bit to "1". When data
4
Set the PRYE bit in the UiMR register (i=0 to 4) to "1", the PRY bit to "1", the UFORM bit in the UiC0
register to "0" and the UiLCH bit in the UiC1 register to "0". When data are transmitted, data set in
UiTB register are transmitted with the even-numbered parity, starting from D
ceived, received data are stored in the UiRB register, starting from D
determines whether a parity error occurs.
are transmitted, values set in the UiTB register are logically inversed and are transmitted with the
odd-numbered parity, starting from D
to be stored in the UiRB register, starting from D
parity error occurs.
a
0 -
n
o r
3 .
1
u
, 1
3
p
1
2
(
M
0
Transfer Clock
Transfer Clock
0
3
(1) Direct Format
6
(2) Inverse Format
2
C
Page 223
8 /
, 3
TxD
TxD
i=0 to 4
M
i
i
3
2
"H"
"H"
"H"
"H"
"L"
"L"
"L"
"L"
C
f o
8 /
4
3
8
) T
8
D
D
0
7
7
. When data are received, received data are logically inversed
D
D
1
6
D
D
2
5
7
D
D
. The odd-numbered parity determines whether a
3
4
D
D
3
4
D
D
2
5
D
D
6
1
D
D
7
0
0
16. Serial I/O (Special Function)
. The even-numbered parity
P : Even parity
P : Odd parity
P
P
0.
When data are re-
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