DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 747
DF2552BR26DV
Manufacturer Part Number
DF2552BR26DV
Description
IC H8S/2552 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Specifications of DF2552BR26DV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
DF2552BR26DV
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20.4
When the pin is set in on-board programming mode and the reset start is executed, the on-board
programming state that can program/erase the on-chip flash memory is entered. On-board
programming mode has three operating modes: user program mode, user boot mode, and boot
mode.
For details of the pin setting for entering each mode, see table 20.1. For details of the state
transition of each mode for flash memory, see figure 20.2.
20.4.1
Boot mode executes programming/erasing user MAT and user boot MAT by means of the control
command and program data transmitted from the host using the on-chip SCI. The tool for
transmitting the control command and program data must be prepared in the host. The SCI
communication mode is set to asynchronous mode. When reset start is executed after this LSI’s
pin is set in boot mode, the boot program in the microcomputer is initiated. After the SCI bit rate
is automatically adjusted, the communication with the host is executed by means of the control
command method.
The system configuration diagram in boot mode is shown in figure 20.6. For details on the pin
setting in boot mode, see table 20.1. The NMI and other interrupts are ignored in boot mode.
However, the NMI and other interrupts should be disabled in the user system.
On-Board Programming Mode
Boot Mode
tool and program
programming
Host
Boot
data
Figure 20.6 System Configuration in Boot Mode
Control command, program data
Reply response
analysis execution
Control command,
software (on-chip)
RxD0
TxD0
On-chip SCI_0
Rev. 6.00 Sep. 24, 2009 Page 699 of 928
This LSI
On-chip RAM
Section 20 Flash Memory
memory
Flash
REJ09B0099-0600
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