DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 744
DF2552BR26DV
Manufacturer Part Number
DF2552BR26DV
Description
IC H8S/2552 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Specifications of DF2552BR26DV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2552BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 20 Flash Memory
20.3.3
When the real-time programming of the user MAT is emulated, RAMER sets the area of the user
MAT which is overlapped with a part of the on-chip RAM. RAMER is initialized to H'00 at a
power-on reset or in hardware standby mode and is not initialized in software standby mode or in
watch mode. The RAMER setting must be executed in user mode or in user program mode.
For the division method of the user-MAT area, see table 20.6. In order to operate the emulation
function certainly, the target MAT of the RAM emulation must not be accessed immediately after
RAMER is programmed. If it is accessed, the normal access is not guaranteed.
Rev. 6.00 Sep. 24, 2009 Page 696 of 928
REJ09B0099-0600
Bit
7 to 5
4
3
2
1
0
Bit Name
⎯
⎯
RAMS
RAM2
RAM1
RAM0
RAM Emulation Register (RAMER)
Initial
Value
All 0
0
⎯
0
0
0
R/W
R
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Reserved
The write value should always be 0.
RAM Select
Sets whether the user MAT is emulated or not. When
RAMS = 1, all blocks of the user boot MAT are in the
programming/erasing protection state.
0: RAM emulation function is invalid
1: RAM emulation function is valid
User MAT Area Select
These bits are used with bit 3 and select the user-MAT
area to be overlapped with the on-chip RAM. (See table
20.6.)
All blocks of the user MAT are not in the
programming/erasing protection state
All blocks of the user MAT are in the
programming/erasing protection state
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