DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 705
DF2552BR26DV
Manufacturer Part Number
DF2552BR26DV
Description
IC H8S/2552 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Specifications of DF2552BR26DV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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mode, watch mode, or module stop mode. As this bit cannot be masked in the interrupt mask
register (IMR), if HCAN interrupt enabling is set in the interrupt controller without clearing the
flag, an HCAN interrupt will be initiated immediately. IRR0 should therefore be cleared during
initialization.
18.8.3
The bus operation interrupt flag (IRR12) in the interrupt register (IRR) is set by CAN bus
operation in HCAN sleep mode. Therefore, this flag is not used by the HCAN to indicate sleep
mode release. Note that the reset status bit (GSR3) in the general status register (GSR) is set in
sleep mode.
18.8.4
When the mailbox interrupt mask register (MBIMR) is set, the interrupt register (IRR8, 2, 1) is not
set by reception completion, transmission completion, or transmission cancellation for the set
mailboxes.
18.8.5
In the case of error active and error passive, REC and TEC normally count up and down. In the
bus-off state, 11-bit recessive sequences are counted (REC + 1) using REC. If REC reaches 96
during the count, IRR4 and GSR1 are set.
18.8.6
Byte or word access can be used on all HCAN registers. Longword access cannot be used.
18.8.7
In medium-speed mode, neither read nor write is possible for the HCAN registers.
18.8.8
All HCAN registers except the message control and message data are initialized in hardware
standby mode, software standby mode, watch mode, or module stop mode.
HCAN Sleep Mode
Interrupts
Error Counters
Register Access
HCAN Medium-Speed Mode
Register Hold in Standby Modes and Watch Mode
Section 18 Controller Area Network (HCAN) [H8S/2556 Group]
Rev. 6.00 Sep. 24, 2009 Page 657 of 928
REJ09B0099-0600
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