DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 669
DF2552BR26DV
Manufacturer Part Number
DF2552BR26DV
Description
IC H8S/2552 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Specifications of DF2552BR26DV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2552BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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18.3.8
ABACK is a status register that indicates the normal cancellation (aborting) of mailbox (buffer)
transmit messages.
Note:
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
ABACK7
ABACK6
ABACK5
ABACK4
ABACK3
ABACK2
ABACK1
⎯
ABACK15
ABACK14
ABACK13
ABACK12
ABACK11
ABACK10
ABACK9
ABACK8
*
Abort Acknowledge Register (ABACK)
Only 1 can be written to this bit for clearing the flag.
Initial Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
Section 18 Controller Area Network (HCAN) [H8S/2556 Group]
Description
These bits are status flags that indicate error-free
cancellation (abortion) of the transmit message in
the corresponding mailboxes 1 to 15. When the
message in mailbox n (n = 1 to 15) has been
canceled error-free, ABACKn is set to 1.
[Setting condition]
•
[Clearing condition]
•
Bit 8 is reserved. This bit is always read as 0. The
write value should always be 0.
Completion of transmit message cancellation for
corresponding mailbox
Writing 1
Rev. 6.00 Sep. 24, 2009 Page 621 of 928
REJ09B0099-0600
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