DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 666
DF2552BR26DV
Manufacturer Part Number
DF2552BR26DV
Description
IC H8S/2552 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Specifications of DF2552BR26DV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
DF2552BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 18 Controller Area Network (HCAN) [H8S/2556 Group]
18.3.5
TXPR is used to set a transmit wait after a transmit message is stored in a mailbox (buffer) (CAN
bus arbitration wait).
Rev. 6.00 Sep. 24, 2009 Page 618 of 928
REJ09B0099-0600
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit Name
TXPR7
TXPR6
TXPR5
TXPR4
TXPR3
TXPR2
TXPR1
⎯
TXPR15
TXPR14
TXPR13
TXPR12
TXPR11
TXPR10
TXPR9
TXPR8
Transmit Wait Register (TXPR)
Initial Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
These bits set a transmit wait (CAN bus arbitration
wait) for the corresponding mailboxes 1 to 15. When
TXPRn (n = 1 to 15) is set to 1, the message in
mailbox n becomes the transmit wait state.
[Clearing conditions]
•
•
Bit 8 is reserved. This bit is always read as 0 and
the write value should always be 0.
Completion of message transmission
Completion of transmission cancellation
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