DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 624

IC H8S/2552 MCU FLASH 176-LFBGA

DF2552BR26DV

Manufacturer Part Number
DF2552BR26DV
Description
IC H8S/2552 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2552BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2552BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 17 IEBus™ Controller (IEB) [H8S/2552 Group]
17.3.18 IEBus Transmit/Runaway Status Register (IETSR)
IETSR detects transmit data ready, transmit start, transmit normal completion, transmit
completion with an error, or runaway states. Each status flags in IETSR corresponds to a bit in the
IEBus transmit/runaway interrupt enable register (IEIET) that enables or disables each interrupt.
Rev. 6.00 Sep. 24, 2009 Page 576 of 928
REJ09B0099-0600
Bit
7
6 to 4 ⎯
3
Bit Name
TxRDY
IRA
Initial
Value
1
All 0
0
R/W
R/W
R/W
Description
Transmit Data Ready
Indicates that the next data can be written to IETBR since
IETBR is empty. This flag is automatically cleared by
DTC* data transfer. When data is transmitted by the CPU,
this flag must be cleared by software. This flag is cleared
by writing 0 after reading a 1 from this flag.
[Setting conditions]
[Clearing conditions]
Reserved
These bits are always read as 0 and cannot be modified.
IEBus Runaway State
Indicates that the on-chip microprogram for IEBus control
is in the runaway states. This flag is set to 1 when a
runaway occurs during either IEBus transmission or
reception. (This flag is not a transfer specific flag and is
also set for a reception runaway.)
[Setting condition]
[Clearing condition]
Note: This flag is not cleared on the end byte of DTC
Immediately after reset
When data can be written to IETBR (when IEB has
loaded data from IETBR to the transmit shift register.)
When writing 0 after reading TxRDY = 1
When data is written to TBR by the DTC by a TxRDY
request.
When the on-chip microprogram is in the runaway
states
When writing 0 after reading IRA = 1
transfer.

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