DF2552BR26DV Renesas Electronics America, DF2552BR26DV Datasheet - Page 31
![IC H8S/2552 MCU FLASH 176-LFBGA](/photos/28/61/286115/176-lfbga_sml.jpg)
DF2552BR26DV
Manufacturer Part Number
DF2552BR26DV
Description
IC H8S/2552 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Specifications of DF2552BR26DV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2552BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Sction 1 Overview
Figure 1.1
Figure 1.2
Figure 1.3
Figure 1.4
Figure 1.5
Figure 1.6
Figure 1.7
Figure 1.8
Section 2 CPU
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.9
Figure 2.10 Memory Data Formats .............................................................................................. 40
Figure 2.11 Instruction Formats (Examples) ................................................................................ 52
Figure 2.12 Branch Address Specification in Memory Indirect Mode......................................... 56
Figure 2.13 State Transitions........................................................................................................ 60
Figure 2.14 Flowchart of Access Method for Registers with Write-Only Bits............................. 64
Section 3 MCU Operating Modes
Figure 3.1
Figure 3.2
Figure 3.3
Section 4 Exception Handling
Figure 4.1
Figure 4.2
Figure 4.3
Pin Arrangement of H8S/2556 Group (FP-144J and FP-144JV) ................................ 6
Pin Arrangement of H8S/2552 Group (FP-144J and FP-144JV) ................................ 7
Pin Arrangement of H8S/2506 Group (FP-144J and FP-144JV) ................................ 8
Memory Map............................................................................................................. 32
CPU Registers ........................................................................................................... 33
Reset Sequence (Advanced Mode with On-Chip ROM Enabled)............................. 78
Internal Block Diagram of H8S/2556 Group .............................................................. 3
Internal Block Diagram of H8S/2552 Group .............................................................. 4
Internal Block Diagram of H8S/2506 Group .............................................................. 5
Pin Arrangement of H8S/2552 Group (BP-176V) ...................................................... 9
Pin Arrangement of H8S/2506 Group (BP-176V) .................................................... 10
Exception Vector Table (Normal Mode)................................................................... 29
Stack Structure in Normal Mode............................................................................... 29
Exception Vector Table (Advanced Mode)............................................................... 30
Stack Structure in Advanced Mode........................................................................... 31
Usage of General Registers ....................................................................................... 34
Stack Status ............................................................................................................... 35
General Register Data Formats (1)............................................................................ 38
General Register Data Formats (2)............................................................................ 39
Address Map of H8S/2556, H8S/2552, and H8S/2506 ............................................. 72
Address Map of H8S/2551 ........................................................................................ 73
Address Map of H8S/2505 ........................................................................................ 74
Stack State after Exception Handling (Advanced Mode).......................................... 82
Operation when SP Value Is Odd.............................................................................. 83
Figures
Rev. 6.00 Sep. 24, 2009 Page xxix of xlvi
REJ09B0099-0600
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