HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 305
![IC H8S MCU FLASH 256K 128-QFP](/photos/12/42/124288/hd64f2638f20j_sml.jpg)
HD64F2638F20J
Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2638F20J
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
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Notes: 1. 2 when EXR is invalid, 3 when EXR is valid.
Instruction
STM
STMAC *
SUB
SUBS
SUBX
TAS
TRAPA
XOR
XORC
XORC
5
2. 5 for concatenated execution, 4 otherwise.
3. An internal operation may require between 0 and 3 additional states, depending on the
4. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
5. These instructions are supported by the H8S/2600 CPU only.
6. The number of states may differ depending on the product. For details, refer to the
Mnemonic
STM.L (ERn–ERn+1),@–SP
STM.L(ERn–ERn+2),@–SP
STM.L(ERn–ERn+3),@–SP
STMAC MACH,ERd
STMAC MACL,ERd
SUB.B Rs,Rd
SUB.W #xx:16,Rd
SUB.W Rs,Rd
SUB.L #xx:32,ERd
SUB.L ERs,ERd
SUBS #1/2/4,ERd
SUBX #xx:8,Rd
SUBX Rs,Rd
TAS @ERd *
TRAPA #x:2
XOR.B #xx:8,Rd
XOR.B Rs,Rd
XOR.W #xx:16,Rd
XOR.W Rs,Rd
XOR.L #xx:32,ERd
XOR.L ERs,ERd
XORC #xx:8,CCR
XORC #xx:8,EXR
preceding instruction.
relevant microcontroller hardware manual of the product in question.
4
Normal
Advanced
Instruction
Fetch
I
2
2
2
1
1
2
1
3
1
1
1
1
2
2
2
1
1
2
3
2
1
2
1
1
Branch
Address
Read
J
1
2
Rev. 4.00 Feb 24, 2006 page 289 of 322
Stack
Operation
K
4
6
8
2/3 *
2/3 *
1
1
Section 2 Instruction Descriptions
Byte Data
Access
L
2
Word Data
Access
M
REJ09B0139-0400
Internal
Operation
N
1
1
1
0 *
0 *
2
2
3
3
*
*
6
6
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