DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 799
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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A.1
Operand Notation
Notes: 1. General registers include 8-bit registers (R0H to R7H, R0L to R7L), 16-bit registers (R0 to R7, E0 to E7), and
Condition Code Notation
2. The MAC register cannot be used in the H8S/2357 Group.
Instruction List
32-bit registers (ER0 to ER7).
Rd
Rs
Rn
ERn
MAC
(EAd)
(EAs)
EXR
CCR
N
Z
V
C
PC
SP
#IMM
disp
+
–
¬
( ) < >
:8/:16/:24/:32
Symbol
*
0
1
—
Changes according to the result of instruction
Undetermined (no guaranteed value)
Always cleared to 0
Always set to 1
Not affected by execution of the instruction
Appendix A Instruction Set
General register (destination)*
General register (source)*
General register*
General register (32-bit register)
Multiply-and-accumulate register (32-bit register)*
Destination operand
Source operand
Extended control register
Condition-code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Program counter
Stack pointer
Immediate data
Displacement
Add
Subtract
Multiply
Divide
Logical AND
Logical OR
Logical exclusive OR
Transfer from the operand on the left to the operand on the right, or
transition from the state on the left to the state on the right
Logical NOT (logical complement)
Contents of operand
8-, 16-, 24-, or 32-bit length
1
1
1
Rev.6.00 Oct.28.2004 page 769 of 1016
2
REJ09B0138-0600H
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