DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 592
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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18.2
18.2.1
The on-chip RAM is enabled or disabled by the RAME bit in SYSCR. For details of other bits in SYSCR, see section
3.2.2, System Control Register (SYSCR).
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is initialized when the reset state is
released. It is not initialized in software standby mode.
18.3
When the RAME bit is set to 1, accesses to addresses H'FFDC00 to H'FFFBFF* are directed to the on-chip RAM. When
the RAME bit is cleared to 0, the off-chip address space is accessed.
Since the on-chip RAM is connected to the CPU by an internal 16-bit data bus, it can be written to and read in byte or
word units. Each type of access can be performed in one state.
Even addresses use the upper 8 bits, and odd addresses use the lower 8 bits. Word data must start at an even address.
Note: * Since the on-chip RAM capacitance differs according to each product, see section 3.5, Memory Map in Each
18.4
DTC register information can be located in addresses H'FFF800 to H'FFFBFF. When the DTC is used, the RAME bit
must not be cleared to 0.
Rev.6.00 Oct.28.2004 page 562 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
Operating Mode.
Register Descriptions
System Control Register (SYSCR)
Operation
Usage Note
Bit 0
RAME
0
1
:
:
R/W
—
7
0
Description
On-chip RAM is disabled
On-chip RAM is enabled
—
—
6
0
INTM1
R/W
5
0
INTM0
R/W
4
0
NMIEG
R/W
3
0
—
—
2
0
R/W
—
1
0
RAME
R/W
0
1
(Initial value)
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