DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 565
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Powering On: To secure the clock duty from power-on, the following switching procedure should be followed.
[1] The initial state is port input and high impedance. Use a pull-up resistor or pull-down resistor to fix the potential.
[2] Fix the SCK pin to the specified output level with the CKE1 bit in SCR.
[3] Set SMR and SCMR, and switch to Smart Card mode operation.
[4] Set the CKE0 bit in SCR to 1 to start clock output.
15.4
The following points should be noted when using the SCI as a Smart Card interface.
Receive Data Sampling Timing and Reception Margin in Smart Card Interface Mode: In Smart Card Interface mode,
the SCI operates on a basic clock with a frequency of 372 times the transfer rate.
In reception, the SCI samples the falling edge of the start bit using the basic clock, and performs internal synchronization.
Receive data is latched internally at the rising edge of the 186th pulse of the basic clock. This is illustrated in figure 15-10.
Thus the reception margin in asynchronous mode is given by the following formula.
Usage Notes
Internal
basic
clock
Receive
data (RxD)
Synchro-
nization
sampling
timing
Data
sampling
timing
Figure 15-10 Receive Data Sampling Timing in Smart Card Mode
[1] [2] [3]
0
186 clocks
Normal operation
Figure 15-9 Clock Halt and Restart Procedure
185
372 clocks
Start bit
371
[4] [5] [6]
0
Software
standby
D0
[7] [8] [9]
Normal operation
185
Rev.6.00 Oct.28.2004 page 535 of 1016
371 0
D1
REJ09B0138-0600H
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