DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 422
DF2398TE20
Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20
HD64F2398TE20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Table 10-12 Up/Down-Count Conditions in Phase Counting Mode 4
Legend:
Phase Counting Mode Application Example: Figure 10-33 shows an example in which phase counting mode is
designated for channel 1, and channel 1 is coupled with channel 0 to input servo motor 2-phase encoder pulses in order to
detect the position or speed.
Channel 1 is set to phase counting mode 1, and the encoder pulse A-phase and B-phase are input to TCLKA and TCLKB.
Channel 0 operates with TCNT counter clearing by TGR0C compare match; TGR0A and TGR0C are used for the
compare match function, and are set with the speed control period and position control period. TGR0B is used for input
capture, with TGR0B and TGR0D operating in buffer mode. The channel 1 counter input clock is designated as the
TGR0B input capture source, and detection of the pulse width of 2-phase encoder 4-multiplication pulses is performed.
TGR1A and TGR1B for channel 1 are designated for input capture, channel 0 TGR0A and TGR0C compare matches are
selected as the input capture source, and store the up/down-counter values for the control periods.
This procedure enables accurate position/speed detection to be achieved.
Rev.6.00 Oct.28.2004 page 392 of 1016
REJ09B0138-0600H
: Rising edge
: Falling edge
TCLKA (Channels 1 and 5)
TCLKC (Channels 2 and 4)
High level
Low level
High level
Low level
TCLKB (Channels 1 and 5)
TCLKD (Channels 2 and 4)
Low level
High level
High level
Low level
Operation
Up-count
Don’t care
Down-count
Don’t care
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