HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 578
HD64F2145BTE20
Manufacturer Part Number
HD64F2145BTE20
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of HD64F2145BTE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Section 18 Host Interface X-Bus Interface (XBS)
command is detected, bit 1 of the data following the host command is output from the GA20
output pin. This operation does not depend on firmware or interrupts, and is faster than the regular
processing using interrupts. Table 18.5 lists the conditions that set and clear GA20 (P81). Figure
18.2 shows the GA20 output in flowchart form. Table 18.6 indicates the GA20 output signal
values.
Table 18.5 GA20 (P81) Set/Clear Timing
Pin Name
GA20
(P81)
Rev. 3.00 Mar 21, 2006 page 522 of 788
REJ09B0300-0300
Setting Condition
Rising edge of the host’s write signal
(IOW) when bit 1 of the written data is 1
and the data follows an H'D1 host
command
No
No
Figure 18.2 GA20 Output
Write bit 1 of data byte
to DR bit of P81/GA20
Wait for next byte
H'D1 command
Data byte?
received?
Start
Yes
Yes
Host write
Host write
Clearing Condition
Rising edge of the host’s write signal
(IOW) when bit 1 of the written data is 0
and the data follows an H'D1 host
command
Also, when bit FGA20E in HICR is cleared
to 0
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