HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 526
HD64F2145BTE20
Manufacturer Part Number
HD64F2145BTE20
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of HD64F2145BTE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Section 16 I
16.4.8
Setting the SW bit to 1 in DDCSWR enables formatless mode to be selected as the IIC_0
operating mode. Switching from formatless mode to the I
automatically when a falling edge is detected on the SCL pin.
The following four preconditions are necessary for this operation:
Rev. 3.00 Mar 21, 2006 page 470 of 788
REJ09B0300-0300
A common data pin (SDA) for formatless and I
Separate clock pins for formatless operation (VSYNCI) and I
A fixed 1 level for the SCL pin during formatless operation (the SCL pin does not output a low
level)
When FS = 1 and FSX = 1 (clocked synchronous serial format)
SCL
SDA
IRIC
User processing
SCL
SDA
IRIC
User processing
Automatic Switching from Formatless Mode to I
2
C Bus Interface (IIC) (Optional)
7
(a) Data transfer ends with ICDRE = 0 at transmission, or ICDRF = 0 at reception
7
(b) Data transfer ends with ICDRE = 1 at transmission, or ICDRF = 1 at reception
7
7
Figure 16.28 IRIC Setting Timing and SCL Control (3)
8
8
8
8
1
1
Clear IRIC
Clear IRIC
2
C bus format operation
2
2
2
C bus format (slave mode) is performed
Write to ICDR (transmit)
or read from ICDR (receive)
2
C Bus Format
2
C bus format operation (SCL)
3
3
1
4
1
4
Clear IRIC
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