R5F61622N50FPV Renesas Electronics America, R5F61622N50FPV Datasheet - Page 48
R5F61622N50FPV
Manufacturer Part Number
R5F61622N50FPV
Description
MCU 24KB FLASH 256K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61622N50FPV
Core Size
16/32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
H8SX
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b, 6x16b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
No. Of I/o's
74
Ram Memory Size
24KB
Cpu Speed
50MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Supply Voltage Range
3V To 3.6V
Embedded Interface Type
I2C, SCI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61622N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 1 Overview
1.4.3
Table 1.4
Rev. 2.00 Sep. 16, 2009 Page 18 of 1036
REJ09B0414-0200
Classification
Power supply
Clock
Operating mode
control
System control
On-chip
emulator
Address bus
Data bus
Bus control
Pin Functions
Pin Functions
Pin Name
V
V
V
PLLV
PLLV
XTAL
EXTAL
Bφ
MD2 to MD0
RES
STBY
EMLE
TRST
TMS
TDI
TCK
TDO
A20 to A0
D15 to D0
BREQ
BREQO
CC
CL
SS
CC
SS
I/O
Input
Input
Input
Input
Input
Input
Input
Output
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Input/
output
Input
Output
Description
Power supply pin. Connect it to the system power supply.
Connect this pin to V
should be placed close to the pin).
Ground pin. Connect it to the system power supply (0 V).
Power supply pin for the PLL circuit. Connect it to the
system power supply.
Ground pin for the PLL circuit.
Pins for a crystal resonator. An external clock signal can be
input through the EXTAL pin. For an example of this
connection, see section 23, Clock Pulse Generator.
Outputs the system clock for external devices.
Pins for setting the operating mode. The signal levels on
these pins must not be changed during operation.
Reset signal input pin. This LSI enters the reset state when
this signal goes low.
This LSI enters hardware standby mode when this signal
goes low.
Input pin for the on-chip emulator enable signal. Input a high
level when using the on-chip emulator, and input a low level
when not using the on-chip emulator.
Pins for the on-chip emulator
Driving the EMLE pin high makes these pins to function as
on-chip emulator pins.
Output pins for the address bits.
Input and output for the bidirectional data bus. These pins
also output addresses when accessing an address–data
multiplexed I/O interface space.
External bus-master modules assert this signal to request
the bus.
Internal bus-master modules assert this signal to request
access to the external space via the bus in the external bus
released state.
SS
via a 0.1-uF capacitor (The capacitor
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