D12674RVFQ33 Renesas Electronics America, D12674RVFQ33 Datasheet - Page 43

IC H8S MCU ROMLESS 144-LQFP

D12674RVFQ33

Manufacturer Part Number
D12674RVFQ33
Description
IC H8S MCU ROMLESS 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of D12674RVFQ33

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33
HD6412674RVFQ33

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Manufacturer
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Type
Bit-manipulation
instructions
Instruction
BSET
BCLR
BNOT
BTST
BAND
BIAND
BOR
BIOR
Size *
B
B
B
B
B
B
B
B
1
Function
1
Sets a specified bit in a general register or memory
operand to 1. The bit number is specified by 3-bit
immediate data or the lower three bits of a general
register.
0
Clears a specified bit in a general register or memory
operand to 0. The bit number is specified by 3-bit
immediate data or the lower three bits of a general
register.
Inverts a specified bit in a general register or memory
operand. The bit number is specified by 3-bit
immediate data or the lower three bits of a general
register.
Tests a specified bit in a general register or memory
operand and sets or clears the Z flag accordingly. The
bit number is specified by 3-bit immediate data or the
lower three bits of a general register.
C
ANDs the carry flag with a specified bit in a general
register or memory operand and stores the result in the
carry flag.
C
ANDs the carry flag with the inverse of a specified bit in
a general register or memory operand and stores the
result in the carry flag.
The bit number is specified by 3-bit immediate data.
C
ORs the carry flag with a specified bit in a general
register or memory operand and stores the result in the
carry flag.
C
ORs the carry flag with the inverse of a specified bit in
a general register or memory operand and stores the
result in the carry flag.
The bit number is specified by 3-bit immediate data.
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
Rev. 4.00 Feb 24, 2006 page 27 of 322
(<bit-No.> of <EAd>)
Z
C
C
C
C
REJ09B0139-0400
Section 1 CPU

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