R4F24268NVRFQV Renesas Electronics America, R4F24268NVRFQV Datasheet - Page 484
R4F24268NVRFQV
Manufacturer Part Number
R4F24268NVRFQV
Description
MCU 256KB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24268NVZFQV.pdf
(1406 pages)
Specifications of R4F24268NVRFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
R4F24268NVRFQV
Manufacturer:
Renesas Electronics America
Quantity:
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Section 8 EXDMA Controller (EXDMAC)
8.4.11
(1)
When the EDA bit is set to 1 in EDMDR, an EXDMA transfer cycle is started a minimum of three
cycles later. There is a one-cycle bus release interval between the end of a one-transfer-unit
EXDMA cycle and the start of the next transfer.
If there is a transfer request for another channel of higher priority, the transfer request by the
original channel is held pending, and transfer is performed on the higher-priority channel from the
next transfer. Transfer on the original channel is resumed on completion of the higher-priority
channel transfer.
Figures 8.28 to 8.30 show operation timing examples for various conditions.
Page 454 of 1372
φ pin
Bus cycle
CPU
operation
ETEND
EDA bit
Auto Request/Cycle Steal Mode/Normal Transfer Mode
Examples of Operation Timing in Each Mode
Figure 8.28 Auto Request/Cycle Steal Mode/Normal Transfer Mode
EDA = 1
write
0
Bus release
1
Internal bus space
3 cycles
cycles
(No Contention/Dual Address Mode)
EXDMA
read
EXDMA
write
1 cycle
Bus
release
EXDMA
read
EXDMA
write
H8S/2426, H8S/2426R, H8S/2424 Group
Bus
release
REJ09B0466-0350 Rev. 3.50
EXDMA
Last transfer cycle
read
EXDMA
write
Jul 09, 2010
0
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