HD64F3687FP Renesas Electronics America, HD64F3687FP Datasheet - Page 526
HD64F3687FP
Manufacturer Part Number
HD64F3687FP
Description
IC H8 MCU FLASH 56K 64-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.HD64F3684GFPV.pdf
(538 pages)
Specifications of HD64F3687FP
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Rev.5.00 Nov. 02, 2005 Page 492 of 500
REJ09B0027-0500
Item
Section 6 Power-Down
Modes
6.1.1 System Control
Register 1 (SYSCR1)
Section 8 RAM
Section 13 Timer Z
Figure 13.17 Example of
Input Capture Operation
13.4.4 Synchronous
Operation
13.4.5 PWM Mode
107
Page Revision (See Manual for Details)
76
208
211
213
214
Note: * When the E7 or E8 is used, area H'F780 to H'FB7F
Figure 13.20 shows an example of synchronous operation. In
this example, synchronous operation has been selected,
FTIOB0 and FTIOB1 have been designated for PWM mode,
GRA_0 compare match has been set as the channel 0 counter
clearing source, and synchronous clearing has been set for the
channel 1 counter clearing source. In addition, the same input
clock has been set as the counter input clock for channel 0 and
channel 1. Two-phase PWM waveforms are output from pins
FTIOB0 and FTIOB1.
Figure 13.22 shows an example of operation in PWM mode.
The output signals go to 1 and TCNT is reset at compare
match A, and the output signals go to 0 at compare match B,
C, and D (TOB, TOC, and TOD = 1, POLB, POLC, and POLD
= 0).
Figures 13.24 (when TOB, TOC, and TOD = 1, POLB, POLC,
and POLD = 0) and 13.25 (when TOB, TOC, and TOD = 0,
POLB, POLC, and POLD = 1) show examples of the output of
PWM waveforms with duty cycles of 0% and 100% in PWM
mode.
Bit
3
H'0180
H'0160
TCNT value
must not be accessed.
Bit
Name
NESEL
Noise Elimination Sampling Frequency
Select
The subclock pulse generator generates the
watch clock signal (
pulse generator generates the oscillator
clock (
frequency of the oscillator clock when the
watch clock signal (
Description
OSC
= 4 to 20 MHz, clear NESEL to 0.
OSC
). This bit selects the sampling
Counter cleared by FTIOB input (falling edge)
W
W
) and the system clock
) is sampled. When
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