MC9S12XEQ384CAL Freescale Semiconductor, MC9S12XEQ384CAL Datasheet - Page 1079
MC9S12XEQ384CAL
Manufacturer Part Number
MC9S12XEQ384CAL
Description
MCU 16BIT 384K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XEQ384CAL
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
24 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
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MC9S12XEQ384CAL
Manufacturer:
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Quantity:
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Company:
Part Number:
MC9S12XEQ384CAL
Manufacturer:
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Quantity:
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Manufacturer:
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Quantity:
20 000
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Chapter 28
768 KByte Flash Module (S12XFTM768K4V2)
28.1
The FTM768K4 module implements the following:
Freescale Semiconductor
Revision
Number
V02.09
V02.10
V02.11
•
768 Kbytes of P-Flash (Program Flash) memory, consisting of 4 physical Flash blocks, intended
primarily for nonvolatile code storage
Introduction
29 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
28.4.2/28-1115
28.4.2/28-1115
28.3.1/28-1084
28.3.2/28-1089
28.1/28-1079
28.4.2.12/28-
28.4.2.12/28-
28.4.2.12/28-
28.4.2.20/28-
28.6/28-1140
28.3.2.1/28-
28.4.2.4/28-
28.4.2.7/28-
28.3.2.1/28-
28.4.1.2/28-
Sections
Affected
1091
1118
1121
1125
1125
1125
1134
1091
1110
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 28-1. Revision History
- Cleanup
- Updated Command Error Handling tables based on parent-child relationship
with FTM1024K5
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Corrected P-Flash Memory Addressing table
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Description of Changes
1079
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