R5F21266SDFP#U0 Renesas Electronics America, R5F21266SDFP#U0 Datasheet - Page 463
R5F21266SDFP#U0
Manufacturer Part Number
R5F21266SDFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SDFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21266SDFP#U0R5F21266SDFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
21.8
21.8.1
Table 21.1
NOTES:
Mode
EW0 During auto-erasure Any interrupt can be used by
21.8.1.1
21.8.1.2
21.8.1.3
1. Do not use the address match interrupt while a command is being executed because the vector of
2. Do not use a non-maskable interrupt while block 0 is being automatically erased because the fixed
Before entering CPU rewrite mode (EW0 mode), select 5 MHz or below for the CPU clock using the CM06 bit
in the CM0 register and bits CM16 to CM17 in the CM1 register.
This does not apply to EW1 mode.
The following instructions cannot be used in EW0 mode because they reference internal data in flash memory:
UND, INTO, and BRK.
Table 21.1 lists the EW0 Mode Interrupts and Table 21.2 lists the EW1 Mode Interrupt.
the address match interrupt is allocated in ROM.
vector is allocated in block 0.
Notes on Flash Memory
Auto-programming
Sep 26, 2008
CPU Rewrite Mode
Operating Speed
Prohibited Instructions
EW0 Mode Interrupts
Interrupts
Status
Page 444 of 453
allocating a vector in RAM
Request is Acknowledged
When Maskable Interrupt
When Watchdog Timer, Oscillation Stop
Detection, Voltage Monitor 1, or Voltage
Once an interrupt request is
acknowledged, the auto-programming
or auto-erasure is forcibly stopped
immediately and the flash memory is
reset. Interrupt handling starts after the
fixed period and the flash memory
restarts. Since the block during auto-
erasure or the address during auto-
programming is forcibly stopped, the
normal value may not be read. Execute
auto-erasure again and ensure it
completes normally.
Since the watchdog timer does not stop
during the command operation,
interrupt requests may be generated.
Reset the watchdog timer regularly.
Monitor 2 Interrupt Request is
Acknowledged
21. Usage Notes
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