R5F21266SDFP#U0 Renesas Electronics America, R5F21266SDFP#U0 Datasheet - Page 204
R5F21266SDFP#U0
Manufacturer Part Number
R5F21266SDFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SDFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21266SDFP#U0R5F21266SDFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 14.28
Timer RC Control Register 1
b7 b6 b5 b4 b3 b2
NOTES:
1.
2.
3. The TRC counter performs free-running operation for the input capture function of the timer mode independent of the
Set to these bits w hen the TSTART bit in the TRCMR register is set to 0 (count stops).
Bits CCLR, TOA, TOB, TOC and TOD are disabled for the input capture function of the timer mode.
CCLR bit setting.
Sep 26, 2008
TRCCR1 Register
b1 b0
Bit Symbol
TRCCR1
Symbol
CCLR
TCK0
TCK1
TCK2
TOA
TOB
TOC
TOD
Page 185 of 453
TRCIOA output level select bit
TRCIOB output level select bit
TRCIOC output level select bit
TRCIOD output level select bit
Count source select bits
TRC counter clear select bit
Address
Bit Name
0121h
(1)
(2, 3)
(1)
(1)
(1)
(1)
b6 b5 b4
0 0 0 : f1
0 0 1 : f2
0 1 0 : f4
0 1 1 : f8
1 0 0 : f32
1 0 1 : TRCCLK input rising edge
1 1 0 : fOCO40M
1 1 1 : Do not set.
Function varies according to the
operating mode (function).
0 : Disable clear (free-running
1 : Clear by compare match in the
operation)
TRCGRA register
After Reset
Function
00h
(2)
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW
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