MC9S08DZ128CLF Freescale Semiconductor, MC9S08DZ128CLF Datasheet - Page 300
MC9S08DZ128CLF
Manufacturer Part Number
MC9S08DZ128CLF
Description
MCU 8BIT 128K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.MC9S08DV96CLF.pdf
(458 pages)
2.MC9S08DV96CLF.pdf
(4 pages)
3.MC9S08DZ128CLF.pdf
(4 pages)
4.MC9S08DZ96MLL.pdf
(4 pages)
Specifications of MC9S08DZ128CLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Package
48LQFP
Family Name
HCS08
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
87
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
24-chx12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ128CLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- MC9S08DV96CLF PDF datasheet
- MC9S08DV96CLF PDF datasheet #2
- MC9S08DZ128CLF PDF datasheet #3
- MC9S08DZ96MLL PDF datasheet #4
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Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
The MSCAN is able to leave sleep mode (wake up) only when:
After wake-up, the MSCAN waits for 11 consecutive recessive bits to synchronize to the CAN bus. As a
consequence, if the MSCAN is woken-up by a CAN frame, this frame is not received.
The receive message buffers (RxFG and RxBG) contain messages if they were received before sleep mode
was entered. All pending actions will be executed upon wake-up; copying of RxBG into RxFG, message
aborts and message transmissions. If the MSCAN remains in bus-off state after sleep mode was exited, it
continues counting the 128 occurrences of 11 consecutive recessive bits.
300
•
•
CAN bus activity occurs and WUPE = 1
or
the CPU clears the SLPRQ bit
The CPU cannot clear the SLPRQ bit before sleep mode (SLPRQ = 1 and
SLPAK = 1) is active.
Figure 12-45. Simplified State Transitions for Entering/Leaving Sleep Mode
StartUp
CAN Activity &
SLPRQ
CAN Activity &
SLPRQ
CAN Activity
MC9S08DZ128 Series Data Sheet, Rev. 1
CAN Activity
CAN Activity
Message
Active
for Idle
Tx/Rx
Wait
Idle
NOTE
SLPRQ
CAN Activity
(CAN Activity & WUPE) | SLPRQ
Sleep
(CAN Activity & WUPE) |
CAN Activity
Freescale Semiconductor
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