TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 224

IC MCU 8BIT FLASH 60KB 80-LQFP

TMP86FS28DFG(JZ)

Manufacturer Part Number
TMP86FS28DFG(JZ)
Description
IC MCU 8BIT FLASH 60KB 80-LQFP
Manufacturer
Toshiba
Series
TLCS-870/Cr
Datasheet

Specifications of TMP86FS28DFG(JZ)

Core Processor
870/C
Core Size
8-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LCD, PWM, WDT
Number Of I /o
62
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
TLCS-870
Core
870/C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SIO, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
62
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
TMP86FS28DFGJZ

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP86FS28DFG(JZ)
Manufacturer:
Toshiba
Quantity:
10 000
17.2 Command Sequence
Table 17-2 Command Sequence
17.2 Command Sequence
1
2
3
4
5
6
17.2.1 Byte Program
17.2.2 Sector Erase (4-kbyte Erase)
Product ID Entry
(4-kbyte Erase)
Product ID Exit
Product ID Exit
as shown in Table 17-2. Addresses specified in the command sequence are recognized with the lower 12 bits
(excluding BA, SA, and FF7FH used for read protection). The upper 4 bits are used to specify the flash memory
area, as shown in Table 17-3.
Byte program
Read Protect
Sector Erase
Chip Erase
(All Erase)
Command
Sequence
The command sequence in the MCU and the serial PROM modes consists of six commands (JEDEC compatible),
Note 1: Set the address and data to be written.
Note 2: The area to be erased is specified with the upper 4 bits of the address.
in the 4th bus write cycle. Each byte can be programmed in a maximum of 40 µs. The next command sequence
cannot be executed until the write operation is completed. To check the completion of the write operation, per-
form read operations repeatedly until the same data is read twice from the same address in the flash memory.
During the write operation, any consecutive attempts to read from the same address is reversed bit 6 of the data
(toggling between 0 and 1).
by the upper 4 bits of the 6th bus write cycle address. For example, in the MCU mode, to erase 4 kbytes from
7000H to 7FFFH, specify one of the addresses in 7000H-7FFFH as the 6th bus write cycle. In the serial PROM
mode, to erase 4 kbytes from 7000H to 7FFFH, set FLSCR<BANKSEL> to "0" and then specify one of the
addresses in F000H-FFFFH as the 6th bus write cycle. The sector erase command is effective only in the MCU
and serial PROM modes, and it cannot be used in the parallel PROM mode.
This command writes the flash memory for each byte unit. The addresses and data to be written are specified
Note:To rewrite data to Flash memory addresses at which data (including FFH) is already written, make sure to
This command erases the flash memory in units of 4 kbytes. The flash memory area to be erased is specified
erase the existing data by "sector erase" or "chip erase" before rewriting data.
Address
555H
555H
555H
555H
555H
555H
XXH
1st Bus Write
Cycle
Table 17-3 Address Specification in the Command Sequence
Data
AAH
AAH
AAH
AAH
AAH
AAH
F0H
Serial PROM mode
Operating Mode
MCU mode
Address
AAAH
AAAH
AAAH
AAAH
AAAH
AAAH
2nd Bus Write
-
Cycle
Data
55H
55H
55H
55H
55H
55H
-
<BANKSEL>
Address
Don’t care
Page 212
(BANK0)
(BANK1)
555H
555H
555H
555H
555H
555H
FLSCR
3rd Bus Write
-
0
1
Cycle
Data
A0H
80H
80H
90H
F0H
A5H
-
Specified Address
Address
(Note 1)
FF7FH
555H
555H
1***H-F***H
9***H-F***H
8***H-F***H
BA
4th Bus Write
-
-
-
Cycle
(Note 1)
Data
Data
AAH
AAH
00H
-
-
-
Address
AAAH
AAAH
5th Bus Write
-
-
-
-
-
Cycle
Data
55H
55H
-
-
-
-
-
TMP86FS28DFG
Address
(Note 2)
555H
SA
6th Bus Write
-
-
-
-
-
Cycle
Data
30H
10H
-
-
-
-
-

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