TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 22

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

2.2 System Clock Controller
Example :Clears RAM to “00H”. (TMP86FS28DFG)
2.2 System Clock Controller
2.2.1 Clock Generator
The system clock controller consists of a clock generator, a timing generator, and a standby controller.
should be initialized by an initialization routine.
and peripheral hardware. It contains two oscillation circuits: One for the high-frequency clock and one for the
low-frequency clock. Power consumption can be reduced by switching of the standby controller to low-power
operation based on the low-frequency clock.
between the XIN/XOUT and XTIN/XTOUT pins respectively. Clock input from an external oscillator is also
possible. In this case, external clock is applied to XIN/XTIN pin with XOUT/XTOUT pin not connected.
The data memory contents become unstable when the power supply is turned on; therefore, the data memory
The clock generator generates the basic clock which provides the system clocks supplied to the CPU core
The high-frequency (fc) clock and low-frequency (fs) clock can easily be obtained by connecting a resonator
SRAMCLR:
XTOUT
XOUT
XTIN
XIN
LD
LD
LD
LD
INC
DEC
JRS
High-frequency
clock oscillator
Low-frequency
clock oscillator
generator
Clock
Figure 2-2 System Colck Control
HL, 0040H
A, H
BC, 07FFH
(HL), A
HL
BC
F, SRAMCLR
fc
fs
Timing generator control register
Clock generator control
Page 10
System clocks
; Start address setup
; Initial value (00H) setup
generator
TBTCR
Timing
0036 H
0038 H
System control registers
SYSCR1
Standby controller
0039 H
TMP86FS28DFG
SYSCR2