TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 206

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

16.2 Control
16.2 Control
LCD Driver Control Register
(0FD9H)
LCDCR
the EDSP.
The LCD driver is controlled using the LCD control register (LCDCR). The LCD driver’s display is enabled using
Note 1: When <BRES>(Booster circuit control) is set to “0”, V
Note 2: When used as the booster circuit, bias should be composed to 1/3. Therefore, do not set LCDCR<DUTY> to "10" or "11"
Note 3: Do not set SLF to “10” or “11” in SLOW1/2 modes.
Note 4: Do not set VFSEL to “11” SLOW1/2 modes.
When <BRES> is set to “1”, 5.5 [V] ≥ V3 ≥ V
If these conditions are not satisfied, it not only affects the quality of LCD display but also may damage the device due to
over voltage of the port.
when the booster circuit is enable.
EDSP
VFSEL
EDSP
BRES
DUTY
7
SLF
BRES
LCD Display Control
Booster circuit control
Selection of boost frequency
Selection of driving methods
Selection of LCD frame fre-
quency
6
5
VFSEL
4
0: Blanking
1: Enables LCD display (Blanking is released)
0: Disable (use divider resistance)
1: Enable
00: 1/4 Duty (1/3 Bias)
01: 1/3 Duty (1/3 Bias)
10: 1/2 Duty (1/2 Bias)
11: Static
3
00
01
10
11
00
01
10
11
DD
DUTY
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should be satisfied.
DV7CK = 0
DV7CK = 0
NORMAL1/2, IDLE/1/2 mode
NORMAL1/2, IDLE/1/2 mode
2
DD
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
≥ V3 ≥ V2 ≥ V1 ≥ V
13
11
10
17
16
15
13
9
1
SLF
DV7CK = 1
DV7CK = 1
fc/2
fc/2
fs/2
fs/2
fs/2
fc/2
fs/2
fs/28
0
15
13
5
3
2
9
9
SS
should be satisfied.
(Initial value: 0000 0000)
SLEEP0/1/2 mode
SLEEP0/1/2 mode
SLOW1/2,
SLOW1/2,
fs/2
fs/2
fs/2
fs/2
fs/2
–
–
–
5
3
2
9
8
TMP86FS28DFG
R/W