TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 198

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

14.3 Function
ADCCR1<AMD>
ADCCR1<ADRS>
Conversion operation
ADCDR1,ADCDR2
ADCDR2<EOCF>
INTADC interrupt request
ADCDR1
ADCDR2
14.3.3 Register Setting
1. Set up the AD converter control register 1 (ADCCR1) as follows:
2. Set up the AD converter control register 2 (ADCCR2) as follows:
3. After setting up (1) and (2) above, set AD conversion start (ADRS) of AD converter control register 1
4. After an elapse of the specified AD conversion time, the AD converted value is stored in AD con-
5. EOCF is cleared to “0” by a read of the conversion result. However, if reconverted before a register
(ADCCR1) to “1”. If software start mode has been selected, AD conversion starts immediately.
verted value register 1 (ADCDR1) and the AD conversion finished flag (EOCF) of AD converted
value register 2 (ADCDR2) is set to “1”, upon which time AD conversion interrupt INTADC is gener-
ated.
read, although EOCF is cleared the previous conversion result is retained until the next conversion is
completed.
• Choose the channel to AD convert using AD input channel select (SAIN).
• Specify analog input enable for analog input control (AINDS).
• Specify AMD for the AD converter control operation mode (software or repeat mode).
• Set the AD conversion time using AD conversion time (ACK). For details on how to set the con-
• Choose IREFON for DA converter control.
version time, refer to Figure 14-1 and AD converter control register 2.
Indeterminate
AD conversion start
1st conversion
result
Figure 14-3 Repeat Mode
2nd conversion result
1st conversion result
Conversion
result read
Conversion
result read
“11”
Page 186
3rd conversion result
2nd conversion result
Conversion
result read
Conversion
result read
3rd conversion result
Conversion
result read
AD convert operation suspended.
Conversion result is not stored.
Conversion
result read
EOCF cleared by reading
conversion result
“00”
TMP86FS28DFG