TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 197

IC MCU 8BIT FLASH 60KB 80-LQFP

TMP86FS28DFG(JZ)

Manufacturer Part Number
TMP86FS28DFG(JZ)
Description
IC MCU 8BIT FLASH 60KB 80-LQFP
Manufacturer
Toshiba
Series
TLCS-870/Cr
Datasheet

Specifications of TMP86FS28DFG(JZ)

Core Processor
870/C
Core Size
8-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LCD, PWM, WDT
Number Of I /o
62
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
TLCS-870
Core
870/C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SIO, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
62
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
TMP86FS28DFGJZ

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP86FS28DFG(JZ)
Manufacturer:
Toshiba
Quantity:
10 000
14.3 Function
14.3.1 Software Start Mode
14.3.2 Repeat Mode
ADCCR1<ADRS>
ADCDR2<ADBF>
ADCDR1 status
ADCDR2<EOCF>
INTADC interrupt request
ADCDR1
ADCDR2
sion of the voltage at the analog input pin specified by ADCCR1<SAIN> is thereby started.
(ADCDR1, ADCDR2) and at the same time ADCDR2<EOCF> is set to 1, the AD conversion finished inter-
rupt (INTADC) is generated.
(Restart) during AD conversion. Before setting ADRS newly again, check ADCDR2<EOCF> to see that the
conversion is completed or wait until the interrupt signal (INTADC) is generated (e.g., interrupt handling rou-
tine).
In this mode, AD conversion is started by setting ADCCR1<ADRS> to “1” after setting ADCCR1<AMD> to
“11” (Repeat mode).
(ADCDR1, ADCDR2) and at the same time ADCDR2<EOCF> is set to 1, the AD conversion finished inter-
rupt (INTADC) is generated.
conversion, set ADCCR1<AMD> to “00” (Disable mode) by writing 0s. The AD convert operation is stopped
immediately. The converted value at this time is not stored in the AD converted value register.
After setting ADCCR1<AMD> to “01” (software start mode), set ADCCR1<ADRS> to “1”. AD conver-
After completion of the AD conversion, the conversion result is stored in AD converted value registers
ADRS is automatically cleared after AD conversion has started. Do not set ADCCR1<ADRS> newly again
AD conversion of the voltage at the analog input pin specified by ADCCR1<SAIN> is performed repeatedly.
After completion of the AD conversion, the conversion result is stored in AD converted value registers
In repeat mode, each time one AD conversion is completed, the next AD conversion is started. To stop AD
Indeterminate
AD conversion start
Figure 14-2 Software Start Mode
Conversion result
read
1st conversion result
Conversion result
read
Page 185
AD conversion start
2nd conversion result
Conversion result
read
Conversion result
read
EOCF cleared by reading
conversion result
TMP86FS28DFG

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