TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 194

IC MCU 8BIT FLASH 60KB 80-LQFP

TMP86FS28DFG(JZ)

Manufacturer Part Number
TMP86FS28DFG(JZ)
Description
IC MCU 8BIT FLASH 60KB 80-LQFP
Manufacturer
Toshiba
Series
TLCS-870/Cr
Datasheet

Specifications of TMP86FS28DFG(JZ)

Core Processor
870/C
Core Size
8-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LCD, PWM, WDT
Number Of I /o
62
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
TLCS-870
Core
870/C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SIO, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
62
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
TMP86FS28DFGJZ

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP86FS28DFG(JZ)
Manufacturer:
Toshiba
Quantity:
10 000
14.2 Register configuration
14.2 Register configuration
AD Converter Control Register 1
ADCCR1
(0FE2H)
The AD converter consists of the following four registers:
Note 1: Select analog input channel during AD converter stops (ADCDR2<ADBF> = "0").
Note 2: When the analog input channel is all use disabling, the ADCCR1<AINDS> should be set to "1".
Note 3: During conversion, Do not perform port output instruction to maintain a precision for all of the pins because analog input
Note 4: The ADCCR1<ADRS> is automatically cleared to "0" after starting conversion.
Note 5: Do not set ADCCR1<ADRS> newly again during AD conversion. Before setting ADCCR1<ADRS> newly again, check
Note 6: After STOP or SLOW/SLEEP mode are started, AD converter control register1 (ADCCR1) is all initialized and no data can
1. AD converter control register 1 (ADCCR1)
2. AD converter control register 2 (ADCCR2)
3. AD converted value register 1 (ADCDR1)
4. AD converted value register 2 (ADCDR2)
port use as general input port. And for port near to analog input, Do not input intense signaling of change.
ADCDR2<EOCF> to see that the conversion is completed or wait until the interrupt signal (INTADC) is generated (e.g.,
interrupt handling routine).
be written in this register. Therfore, to use AD converter again, set the ADCCR1 newly after returning to NORMAL1 or
NORMAL2 mode.
form AD conversion and controls the AD converter as it starts operating.
resistor network).
ADRS
This register selects the analog channels and operation mode (Software start or repeat) in which to per-
This register selects the AD conversion time and controls the connection of the DA converter (Ladder
This register used to store the digital value fter being converted by the AD converter.
This register monitors the operating status of the AD converter.
AINDS
ADRS
7
AMD
SAIN
AD conversion start
AD operating mode
Analog input control
Analog input channel select
6
AMD
5
AINDS
4
0:
1:
00:
01:
10:
11:
0:
1:
0000:
0001:
0010:
0011:
0100:
0101:
0110:
0111:
1000:
1001:
1010:
1011:
1100:
1101:
1110:
1111:
Page 182
3
AD conversion start
AD operation disable
Software start mode
Reserved
Repeat mode
Analog input enable
Analog input disable
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
-
2
SAIN
1
0
(Initial value: 0001 0000)
TMP86FS28DFG
R/W

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