TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 165

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

11.3 Serial clock
11.3.1 Clock source
SIO Status Register
Note 1: The lower 4 bits of each buffer are used during 4-bit transfers. Zeros (0) are stored to the upper 4bits when receiving.
Note 2: Transmitting starts at the lowest address. Received data are also stored starting from the lowest address to the highest
Note 3: The value to be loaded to BUF is held after transfer is completed.
Note 4: SIOCR2 must be set when the serial interface is stopped (SIOF = 0).
Note 5: *: Don't care
Note 6: SIOCR2 is write-only register, which cannot access any of in read-modify-write instruction such as bit operate, etc.
Note 1: T
Note 2: After SIOS is cleared to "0", SIOF is cleared to "0" at the termination of transfer or the setting of SIOINH to "1".
(0F69H)
SIOSR
Internal clock or external clock for the source clock is selected by SIOCR1<SCK>.
SCK output
address. ( The first buffer address transmitted is 0F60H ).
f
; Frame time, T
WAIT
SIOF
BUF
SEF
SIOF
7
Figure 11-2 Frame time (T
Wait control
Number of transfer words
(Buffer address in use)
Serial transfer operating status moni-
tor
Shift operating status monitor
(output)
SEF
D
6
; Data transfer time
5
4
Page 153
Always sets "00" except 8-bit transmit / receive mode.
00:
01:
10:
11:
000:
001:
010:
011:
100:
101:
110:
111:
3
TD
0:
1:
0:
1:
f
) and Data transfer time (T
Tf
Transfer terminated
Transfer in process
Shift operation terminated
Shift operation in process
T
T
T
T
1 word transfer
8 words transfer
4 words transfer
7 words transfer
2 words transfer
3 words transfer
5 words transfer
6 words transfer
f
f
f
f
= 8T
= T
= 2T
= 4T
2
D
D
(Non wait)
D
D
(Wait)
(Wait)
(Wait)
1
0F60H
0F60H ~ 0F61H
0F60H ~ 0F62H
0F60H ~ 0F63H
0F60H ~ 0F64H
0F60H ~ 0F65H
0F60H ~ 0F66 H
0F60H ~ 0F67H
0
D
)
TMP86FS28DFG
Write
Read
only
only