TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 115

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

TC11 pin Input
Up-counter
TC11DRA
INTTC11
interrput request
8.2.3.3
Either the rising or falling edge of the input pulse is selected as the count up edge in TC11CR<TC11S>.
generated and the up-counter is cleared. After being cleared, the up-counter restarts counting at each edge
of the input pulse to the TC11 pin. Since a match between the up-counter and the value set to TC11DRA
is detected at the edge opposite to the selected edge, an INTTC11 interrupt request is generated after a
match of the value at the edge opposite to the selected edge.
function. Use the auto-capture function in the operative condition of TC11. A captured value may not be
fixed if it's read after the execution of the timer stop or auto-capture disable. Read the capture value in a
capture enabled condition. Since the up-counter value is captured into TC11DRB by the source clock of
up-counter after setting TC11CR<ACAP11> to "1". Therefore, to read the captured value, wait at least
one cycle of the internal source clock before reading TC11DRB for the first time.
Event Counter Mode
In the event counter mode, the up-counter counts up at the edge of the input pulse to the TC11 pin.
When a match between the up-counter and the TC11DRA value is detected, an INTTC11 interrupt is
Two or more machine cycles are required for the low-or high-level pulse input to the TC11 pin.
Setting TC11CR<ACAP11> to “1” captures the up-counter value into TC11DRB with the auto capture
Table 8-4 Input Pulse Width to TC11 Pin
?
Timer start
High-going
Low-going
Figure 8-12 Event Counter Mode Timing Chart
0
n
1
NORMAL1/2, IDLE1/2 Mode
2
2
2
Page 103
3
3
/fc
/fc
Minimum Pulse Width [s]
Match detect
n - 1
SLOW1/2, SLEEP1/2 Mode
n
0
Counter clear
2
2
3
3
/fs
/fs
1
2
TMP86FS28DFG
(TC11S = 10)
At the
rising edge