TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 111

IC MCU 8BIT FLASH 60KB 80-LQFP

TMP86FS28DFG(JZ)

Manufacturer Part Number
TMP86FS28DFG(JZ)
Description
IC MCU 8BIT FLASH 60KB 80-LQFP
Manufacturer
Toshiba
Series
TLCS-870/Cr
Datasheet

Specifications of TMP86FS28DFG(JZ)

Core Processor
870/C
Core Size
8-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LCD, PWM, WDT
Number Of I /o
62
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Processor Series
TLCS-870
Core
870/C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SIO, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
62
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
TMP86FS28DFGJZ

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMP86FS28DFG(JZ)
Manufacturer:
Toshiba
Quantity:
10 000
In the timer mode, the up-counter counts up using the internal clock. When a match between the up-counter and the timer
register 1A (TC11DRA) value is detected, an INTTC11 interrupt is generated and the up-counter is cleared. After being
cleared, the up-counter restarts counting. Setting TC11CR<ACAP11> to “1” captures the up-counter value into the timer
register 1B (TC11DRB) with the auto-capture function. Use the auto-capture function in the operative condition of TC11.
A captured value may not be fixed if it's read after the execution of the timer stop or auto-capture disable. Read the capture
value in a capture enabled condition. Since the up-counter value is captured into TC11DRB by the source clock of up-
counter after setting TC11CR<ACAP11> to "1". Therefore, to read the captured value, wait at least one cycle of the internal
source clock before reading TC11DRB for the first time.
8.2.3 Function
Table 8-3 Internal Source Clock for TimerCounter 11 (Example: fc = 16 MHz, fs = 32.768 kHz)
8.2.3.1
TC11CK
Note 3: To set the mode, source clock, PPG output control and timer F/F control, write to TC11CR1 during TC11S=00. Set the
Note 4: Auto-capture can be used only in the timer, event counter, and window modes.
Note 5: To set the timer registers, the following relationship must be satisfied.
Note 6: Set TFF11 to “0” in the mode except PPG output mode.
Note 7: Set TC11DRB after setting TC11M to the PPG output mode.
Note 8: When the STOP mode is entered, the start control (TC11S) is cleared to “00” automatically, and the timer stops. After the
Note 9: Use the auto-capture function in the operative condition of TC11. A captured value may not be fixed if it's read after the
Note 10:Since the up-counter value is captured into TC11DRB by the source clock of up-counter after setting TC11CR<ACAP11>
00
01
10
pulse width measurement, programmable pulse generator output modes.
TimerCounter 11 has six types of operating modes: timer, external trigger timer, event counter, window,
byte and the upper byte in this order (it is recommended to write the register with a 16-bit access instruction). Writing only
the lower byte (TC11DRAL and TC11DRBL) does not enable the setting of the timer register.
timer F/F10 control until the first timer start after setting the PPG mode.
TC11DRA > TC11DRB > 1 (PPG output mode), TC11DRA > 1 (other modes)
STOP mode is exited, set the TC11S to use the timer counter again.
execution of the timer stop or auto-capture disable. Read the capture value in a capture enabled condition.
to "1". Therefore, to read the captured value, wait at least one cycle of the internal source clock before reading TC11DRB
for the first time.
Timer mode
Resolution
128
[µs]
8.0
0.5
DV7CK = 0
Maximum Time Setting
32.77 m
0.524
8.39
NORMAL1/2, IDLE1/2 mode
[s]
Page 99
Resolution
244.14
[µs]
8.0
0.5
DV7CK = 1
Maximum Time Setting
32.77 m
0.524
16.0
[s]
Resolution
SLOW, SLEEP mode
244.14
[µs]
TMP86FS28DFG
Maximum
Time Set-
ting [s]
16.0

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