TMP86FS28DFG(JZ) Toshiba, TMP86FS28DFG(JZ) Datasheet - Page 110

• Manufacturer Part Number: TMP86FS28DFG(JZ)
• Description: IC MCU 8BIT FLASH 60KB 80-LQFP
• Manufacturer: Toshiba
• Series: TLCS-870/Cr

Specifications of TMP86FS28DFG(JZ)

• Core Processor: 870/C
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Processor Series: TLCS-870
• Core: 870/C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SIO, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: BM1040R0A, BMP86A100010A, BMP86A100010B, BMP86A200010B, BMP86A200020A, BMP86A300010A, BMP86A300020A, BMP86A300030A, SW89CN0-ZCC, SW00MN0-ZCC
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: BM1401W0A-G - FLASH WRITER ON-BOARD PROGRAMTMP89C900XBG - EMULATION CHIP TMP89F LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: TMP86FS28DFGJZ

8.2 16-Bit TimerCounter 11
Timer Register
TC11DRA
(0021H, 0020H)
TC11DRB
(0023H, 0022H)
TimerCounter 11 Control Register
8.2.2 TimerCounter Control
MPPG11
MCAP11
ACAP11
METT11
TC11CK
TC11CR
(0024H)
TC11M
TC11S
TFF11
Note 1: fc: High-frequency clock [Hz], fs: Low-frequency clock [Hz]
Note 2: The timer register consists of two shift registers. A value set in the timer register becomes valid at the rising edge of the
registers (TC11DRA and TC11DRB).
The TimerCounter 11 is controlled by the TimerCounter 11 control register (TC11CR) and two 16-bit timer
Timer F/F11 control
Auto capture control
Pulse width measure-
ment mode control
External trigger timer
mode control
PPG output control
TC11 start control
TC11 source clock select
[Hz]
TC11 operating mode
select
first source clock pulse that occurs after the upper byte (TC11DRAH and TC11DRBH) is written. Therefore, write the lower
TFF11
15
7
MCAP11
MPPG11
ACAP11
METT11
14
6
(Initial value: 1111 1111 1111 1111)
(Initial value: 1111 1111 1111 1111)
13
TC11DRAH (0021H)
TC11DRBH (0023H)
5
0: Clear
0:Auto-capture disable
0:Double edge capture
0:Trigger start
0:Continuous pulse generation
00: Stop and counter clear
01: Command start
10: Rising edge start
11: Falling edge start
00: Timer/external trigger timer/event counter mode
01: Window mode
10: Pulse width measurement mode
11: PPG (Programmable pulse generate) output mode
00
01
10
11
12
TC11S
Rising edge count (Event)
Positive logic count (Window)
Falling edge count (Event)
Negative logic count (Window)
11
4
10
(Ex-trigger/Pulse/PPG)
(Ex-trigger/Pulse/PPG)
DV7CK = 0
fc/2
3
fc/2
fc/2
TC11CK
11
7
3
Page 98
9
NORMAL1/2, IDLE1/2 mode
2
8
External clock (TC11 pin input)
1
7
Timer
TC11M
Read/Write (Write enabled only in the PPG output mode)
O
O
–
–
6
1: Set
1:Auto-capture enable
1:Single edge capture
1:Trigger start and stop
1:One-shot
Extrig-
0
ger
O
O
O
DV7CK = 1
–
fs/2
fc/2
fc/2
5
Read/Write
(Initial value: 0000 0000)
3
7
3
Event
TC11DRAL (0020H)
TC11DRBL (0022H)
O
O
O
–
Read/Write
4
Win-
dow
O
O
O
–
3
Divider
Pulse
DV9
DV5
DV1
TMP86FS28DFG
O
O
O
–
2
SLEEP
SLOW,
mode
PPG
fs/2
O
O
O
O
–
–
1
3
R/W
R/W
R/W
R/W
R/W
0