ST7FMC2R7T6 STMicroelectronics, ST7FMC2R7T6 Datasheet - Page 116
ST7FMC2R7T6
Manufacturer Part Number
ST7FMC2R7T6
Description
MCU 8BIT 48K FLASH 64TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FMC2S4T6.pdf
(309 pages)
Specifications of ST7FMC2R7T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ST7FMC2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
60
Number Of Timers
5
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-6408 - BOARD EVAL BLDC SENSORLESS MOTOR497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-4869
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FMC2R7T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST7FMC2R7T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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ST7MC1xx/ST7MC2xx
LINSCI™ SERIAL COMMUNICATION INTERFACE (SCI Mode) (cont’d)
10.5.6 Low Power Modes
116/309
1
Mode
Wait
Halt
Description
No effect on SCI.
SCI interrupts cause the device to exit from
Wait mode.
SCI registers are frozen.
In Halt mode, the SCI stops transmitting/re-
ceiving until Halt mode is exited.
10.5.7 Interrupts
The SCI interrupt events are connected to the
same interrupt vector (see Interrupts chapter).
These events generate an interrupt if the corre-
sponding Enable Control Bit is set and the inter-
rupt mask in the CC register is reset (RIM instruc-
tion).
Transmit Data Register
Empty
Transmission Com-
plete
Received Data Ready
to be Read
Overrun Error or LIN
Synch Error Detected
Idle Line Detected
Parity Error
LIN Header Detection
Interrupt Event
Event
TDRE
RDRF
LHDF
Flag
IDLE
LHE
OR/
TC
PE
Control
Enable
TCIE
LHIE
ILIE
Bit
RIE
TIE
PIE
from
Wait
Exit
Yes
from
Halt
Exit
No
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